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PDF KM68FU1000A Data sheet ( Hoja de datos )
| Número de pieza | KM68FU1000A | |
| Descripción | CMOS SRAM | |
| Fabricantes | Samsung Semiconductor | |
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KM68FU1000A Family
Document Title
128Kx8 bit Super Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0 Design target
0.1 Revise
www.DataSheet4U.com 1.0
Finalize
- Change VDR : 1.0 to 1.5V
- Change IDR test condition : VCC=1.2 to 1.5V
Draft Data
November 3, 1998
January 9, 1999
February 25, 1999
Remark
Advance
Preliminary
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.
Revision 1.0
February 1999
1 page  
KM68FU1000A Family
AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Test Input/Output Reference)
Input pulse level: 0.2 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage: 1.5V
Output load (See right): CL= 100pF+1TTL
AC CHARACTERISTICS (Vcc=2.7~3.3V, TA=-40 to 85°C)
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Parameter List
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tRC
tAA
tCO1, tCO2
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
CMOS SRAM
VTM3)
R12)
CL1)
R22)
1. Including scope and jig capacitance
2. R1=3070Ω, R2=3150Ω
3. VTM =2.8V
Speed Bins
70ns
100ns
Min Max Min Max
70 - 100 -
- 70 - 100
- 70 - 100
- 35 - 50
10 - 10 -
5-5-
0 25 0 30
0 25 0 30
10 - 15 -
70 - 100 -
60 - 80 -
0-0-
60 - 80 -
55 - 70 -
0-0-
0 25 0 30
30 - 40 -
0-0-
5-5-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Vcc for data retention
VDR CS1≥Vcc-0.2V1)
Data retention current
IDR Vcc=1.5V, CS1≥Vcc-0.2V1)
Data retention set-up time
Recovery time
tSDR
tRDR
See data retention waveform
1. CS1≥Vcc-0.2V, CS2≥Vcc-0.2V(CS1 controlled) or CS2≤0.2V(CS2 controlled)
Min Typ Max Unit
1.5 - 3.3 V
- - 1 µA
0-
tRC -
- ms
-
Revision 1.0
February 1999
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet KM68FU1000A.PDF ] | |
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