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PDF LH5324500 Data sheet ( Hoja de datos )
| Número de pieza | LH5324500 | |
| Descripción | CMOS 24M (3M x 8/1.5M x 16) MROM | |
| Fabricantes | Sharp Electrionic Components | |
| Logotipo |  |
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LH5324500
CMOS 24M (3M × 8/1.5M × 16) MROM
FEATURES
• 3,145,728 words × 8 bit organization
(Byte mode)
1,572,864 words × 16 bit organization
(Word mode)
• Access time: 150 ns (MAX.)
• Power consumption:
Operating: 357.5 mW (MAX.)
Standby: 550 µW (MAX.)
• Static operation
• TTL compatible I/O
• Three-state outputs
• Single +5 V power supply
• Package: 44-pin, 600-mil SOP
DESCRIPTION
The LH5324500 is a 24M-bit mask-programmable
ROM organized as 3,145,728 × 8 bits (Byte mode) or
1,572,864 × 16 bits (Word mode) that can be selected
by a BYTE input pin. It is fabricated using silicon-gate
CMOS process technology.
PIN CONNECTIONS
44-PIN SOP
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
D0
D8
D1
D9
D2
D10
D3
D11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TOP VIEW
44 A20
43 A19
42 A8
41 A9
40 A10
39 A11
38 A12
37 A13
36 A14
35 A15
34 A16
33 BYTE
32 GND
31 D15/A-1 (LSB)
30 D7
29 D14
28 D6
27 D13
26 D5
25 D12
24 D4
23 VCC
5324500-1
Figure 1. Pin Connections for SOP Package
1
1 page  
CMOS 24M MROM
tRC
A-1 - A20
CE
OE
tAA
(NOTE)
tACE
(NOTE)
tOE
(NOTE)
tCHZ
tOHZ
tOH
D0 - D7
NOTE: The output data becomes valid when the last
intervals, tAA, tACE, or tOE, have concluded.
DATA VALID
Figure 3. Byte Mode (BYTE = VIL)
tRC
A0 - A20
CE
OE
tAA
(NOTE)
tACE
(NOTE)
tOE
(NOTE)
tCHZ
tOHZ
tOH
D0 - D15
NOTE: The output data becomes valid when the last
intervals, tAA, tACE, or tOE, have concluded.
DATA VALID
Figure 4. Word Mode (BYTE = VIH)
LH5324500
5324500-3
5324500-4
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet LH5324500.PDF ] | |
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