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PDF LH5164AV Data sheet ( Hoja de datos )
| Número de pieza | LH5164AV | |
| Descripción | CMOS 64K (8K x 8) Static RAM | |
| Fabricantes | Sharp Electrionic Components | |
| Logotipo |  |
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LH5164AV
CMOS 64K (8K × 8) Static RAM
FEATURES
• 8,192 × 8 bit organization
• Access time: 200 ns (MAX.)
• Supply current (MAX.):
Operating: 248 mW
55 mW (tRC, tWC = 1 µs)
Standby: 5.5 µW
Data retention:
0.6 µW (VCC = 3 V, tA = 25°C)
• Wide operating voltage range:
2.7 V to 5.5 V
• Fully-static operation
• TTL compatible I/O
• Three-state outputs
• Packages:
28-pin, 450-mil SOP
28-pin, 8 × 13 mm2 TSOP (Type I)
DESCRIPTION
The LH5164AV is a static RAM organized as 8,192 × 8
bits. It is fabricated using silicon-gate CMOS process
technology.
PIN CONNECTIONS
28-PIN SOP
TOP VIEW
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 WE
26 CE2
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE1
19 I/O8
18 I/O7
17 I/O6
16 I/O5
15 I/O4
5164AV-1
Figure 1. Pin Connections for SOP Package
28-PIN TSOP (Type I)
TOP VIEW
OE
A11
A9
A8
CE2
WE
VCC
NC
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 A10
27 CE1
26 I/O8
25 I/O7
24 I/O6
23 I/O5
22 I/O4
21 GND
20 I/O3
19 I/O2
18 I/O1
17 A0
16 A1
15 A2
5164AV-2
Figure 2. Pin Connections for TSOP Package
1
1 page  
CMOS 64K (8K × 8) Static RAM
READ CYCLE (TA = –10°C to +70°C, VCC = 2.7 V to 5.5 V)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
Read cycle time
tRC 200
ns
Address access time
tAA
200 ns
CE1 access time
tACE1
200 ns
CE2 access time
tACE2
200 ns
Output enable access time
tOE
150 ns
Output hold time
tOH 10
ns
CE1 Low to output in Low-Z tLZ1 20
ns
CE2 High to output in Low-Z tLZ2 20
ns
OE Low to output in Low-Z
tOLZ
10
ns
CE1 High to output in High-Z
tHZ1
0
60 ns
CE2 Low to output in High-Z
tHZ2
0
60 ns
OE High to output in High-Z tOHZ 0
40 ns
WRITE CYCLE (TA = –10°C to +70°C, VCC = 2.7 V to 5.5 V)
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
Write cycle time
tWC 200
ns
CE Low to end of write
tCW 180
ns
Address valid to end of write tAW 180
ns
Address setup time
tAS 0
ns
Write pulse width
tWP 150
ns
Write recovery time
tWR 0
ns
Input data setup time
tDW 100
ns
Input data hold time
tDH 0
ns
WE High to output in Low-Z tOW 20
ns
WE Low to output in High-Z tWZ 0 60 ns
OE High to output in High-Z
tOHZ
0
40 ns
TEST CONDITIONS
PARAMETER
MODE
Input pulse level
Input rise/fall time
0.2 V to VCC – 0.2 V
10 ns
Input/output timing level
1.5 V
Output load
CL (100 pF)
NOTE:
1. Includes scope and jig capacitance.
NOTE
1
CAPACITANCE 1 (TA = 25°C, f = 1 MHz)
PARAMETER
SYMBOL CONDITIONS MIN.
Input capacitance
CIN
VIN = 0 V
I/O capacitance
CI/O
VI/O = 0 V
NOTE:
1. This parameter is sampled and not production tested.
TYP.
MAX.
7
10
UNIT
pF
pF
LH5164AV
5
5 Page 
CMOS 64K (8K × 8) Static RAM
28TSOP (TSOP028-P-0813)
0.28 [0.011] 0.55 [0.022]
0.12 [0.005]
TYP.
28 15
12.00 [0.472] 13.70 [0.539]
11.60 [0.457] 13.10 [0.516]
LH5164AV
12.60 [0.496]
12.20 [0.480]
1 14
8.20 [0.323]
7.80 [0.307]
0.15 [0.006]
1.10 [0.043]
0.90 [0.035]
1.20 [0.047]
MAX.
0.20 [0.008]
0.10 [0.004]
DETAIL
0 - 10°
0.425 [0.017]
0.20 [0.008]
0.00 [0.000]
DIMENSIONS IN MM [INCHES]
MAXIMUM LIMIT
MINIMUM LIMIT
0.425 [0.017]
1.10 [0.043]
0.90 [0.035]
0.20 [0.008]
0.00 [0.000]
28-pin, 8 × 13 mm2 TSOP (Type I)
28TSOP
ORDERING INFORMATION
LH5164AV
X
Device Type Package
N 28-pin, 450-mil SOP (SOP028-P-0450)
T 28-pin, 8 x 13 mm2 TSOP (Type I) (TSOP028-P-0813)
CMOS 64K (8K x 8) Static RAM
Example: LH5164AVN (CMOS 64K (8K x 8) Static RAM, 28-pin, 450-mil SOP)
5164AV-8
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet LH5164AV.PDF ] | |
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