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PDF SC4901 Data sheet ( Hoja de datos )
| Número de pieza | SC4901 | |
| Descripción | COMBI-SYNC Secondary Side Synchronous Rectifier and Regulator | |
| Fabricantes | Semtech Corporation | |
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POWER MANAGEMENT
SC4901
COMBI-SYNC Secondary Side
Synchronous Rectifier and Regulator
Description
Features
SC4901 is a unique secondary side regulator designed
for implementing Semtech’s proprietary Combi-Sync
topology for isolated convertors with multiple outputs. The
Combi-Sync is a true all-MOSFET topology that allows
synchronous rectification and post regulation of
transformer isolated outputs, resulting in higher efficiency
and low component count. Details of this unique topology
are described in the Application Information section.
www.DataMShueeltt4ipUl.ecomoutputs can be synchronously rectified and
independently regulated by individual SC4901s. Each
output has its own ON/OFF control, soft start, remote sense
and current limits. They can be turned on or off without
affecting the primary or other outputs. The secondary side
control makes it much easier to design tight control loops
and implement load current sharing and hot swap
features. All devices are synchronised to the transformer
winding. The current sense can be either from the output
inductor for high efficiency or a resistor for better accuracy.
An amplified current signal is provided for external use.
Single controller performs synchronous rectification
and post regulation
Independent regulation of multiple outputs from a
common secondary winding
Turn on shoot through inherently eliminated
Primary switch turns ON and OFF with zero current
No synchronising or any other signals needed across
the isolation boundary
Eliminates the need for a secondary bias supply
Independent soft start, ON/OFF, remote sense and
current limit for each output
Resistive or inductive current sensing with 2V current
signal and 2.5V reference for external applications.
4.5 to 18V operation
Max operating frequency to 1 MHz
Low profile 16 pin TSSOP package
Based on Semtech’s patented Combi Sync
concept
Applications
Each device is capable of driving high side MOSFETs with
2A current. The forward drive is configured for direct
connection to a 1:1 pulse transformer. SC4901 has an
undervoltage lockout with typical turn-on threshold of 4.5V
and is available in a low cost TSSOP-16 package
Typical Application Circuit
Telecom isolated DC to DC converters with multiple
low voltage outputs
High density brick and sub brick modules with
independently regulated multiple outputs
Distributed power architectures
Isolated VRMs
SIN GLE
EN DED
FORWARD
C ON VER TOR
••
T1
QS
T2
R4 R5
QF
R8
L1
QR
R9
R1
R6 R7
VO UT
R2 R3
C1 C2
R10
C3
R TN
D1 D2
RZ RT R13 D3
C6
R14
C4 C5
U 1 S C 4901
R11 R12
CAO
D4
CT
Revision: May, 2005
C9 C8 C7
C10 R15
United States Patent 6,788,554
1
www.semtech.com
1 page  
SC4901
POWER MANAGEMENT
Pin Descriptions
Pin #
1
2
3
4
www.DataSheet4U5.com
6
7
8
9
10
11
12
13
14
15
16
Pin Name
CS+
CS-
CAO
SSEN
AVCC
OUTB
XFRA
PGND
PVCC
OUTA
REF
VEA-
VEA
RCT
ZCD
AGND
Pin Function
Current sense non inverting input to the differential current amplifier.
Maximum differential wrt to CS- is 200 mV.
Current sense inverting input to the differential current amplifier.
Output of the differential current amplifier. Current limit threshold is set to 2.5V at this pin.
Soft Start and Enable pin. Taking this pin below 0.65V will shut down both the gate drives
Analog supply voltage. Max rating is up to 18V.
Gate drive for the low side rectifying MOSFET.
Transformer connection for the gate driver of the bidirectional forward MOSFET pair.
High current sinking open collector terminal synchronised to OUTA.
Connect the lower end of the gate drive transformer to this pin.
Ground return for gate drive currents.
Power supply for the gate drive circuits.
Bypass with a minimum of 10 uF electrolytic and a 1 uF Ceramic capacitor to PGND.
Gate drive for the high side bidirectional forward MOSFET pair.
Reference out voltage of 2.5V for external use.
Up to 5 mA can be drawn from the pin.
Output voltage sense feedback to error amplifier inverting input. Reference level is 0.75V
Error amplifier output for feedback compensation.
Connection pin for the timing resistor and capacitor.
Zero Crossover Detect. Detects the transitions of the transformer secondary and
synchronises the ramp set up by RCT components.
Internally clamped to AGND on the low side
Analog Ground for all the signal return paths.
2005 Semtech Corp.
5
www.semtech.com
5 Page 
SC4901
POWER MANAGEMENT
Application Information (Cont.)
In all these cases OUTA and XFRA are turned off and, after
a fixed delay of 110 nS, the rectifier MOSFET is turned on.
Both OUTA and XFRA can sink or source + 2A peak current.
Since OUTA has to drive a level shifted MOSFET gate, it
must be used with a pulse transformer. Note that the
common source of the high side FETs presents a negative
voltage to the return pin of any high side drive circuit and
therefore a semiconductor driver is not recommended in
this application. Another pin called XFRA is provided to
www.DatasSihmepetl4ifUy.ctohme gate drive design with a 1:1 transformer. The
XFRA is configured as a high current open collector
transistor and is turned on and off synchronously with
OUTA. If the maximum duty cycle expected is less than 50%,
the pulse transformer can be connected directly between
OUTA and XFRA. This ensures that the gate is always driven
with PVCC during both on and off periods. A 1A Schottky or
ultrafast rectifier should be connected in reverse across
the XFRA transistor. This is required to discharge the
MOSFET gate rapidly during turn off. Refer to DTO in Fig.
3a) In addition, a smaller signal diode should be connected
from XFRA to PVCC supply to reset the driver transformer.
This diode may be rated to carry the magnetising current
of the drive transformer. Refer DRES in Fig 3a) below.
VSEC
If maximum duty ratio is more than 50% a ceramic
capacitor C RES may be added in series to the transformer
primary as shown in Fig 3b). The capacitor carries a small
voltage only when duty ratio is more than 50% which
correspondingly reduces the gate drive voltage during the
ON time.
Alternately an additional zener Z RES may be used to reset
the transformer during the OFF time as shown in Fig 3c).
The zener voltage VZ should be
VZ > PVCC x (2D -1 ) / (1-D) to reset the transformer
Note that in this arrangement the OFF voltage applied to
the MOSFET gates increases to ( PVCC + VZ ).
Inside the SC4901, the drive circuits are powered by a
separate supply and ground pair, designated as PVCC and
PGND. Adequate and independent noise bypassing of both
AVCC and PVCC to the corresponding grounds is strongly
recommended.
VOUT
S I N GLE
EN DED
FORWARD
CON VERTOR
••
RZ
OPTION AL
DV CC
CT RT
16
GND
15
ZCD
14
RCT
13
VE A
12
VE A-
11 10 9
RE F OUTA PVCC
T RANSFORM ER
S E CO NDA RY
SYNC AND RAMP
-
+
+-
SC 4 9 0 1
PWM LOGIC
A ND
OUT P UT
DRIV E RS
CS+
1
CS-
2
CAO
3
SSEN VCC
45
OUTB XFRA PGND
678
C urre nt
Sense
C SS
QS
RGS
PVCC
RG
DRES
••
XFRA
DTO
PGN D
QF L
QR
COUT
RTN
XFRA PIN IS PROVIDED TO
SIMPLIFY PULSE
TRANSFORMER DESIGN
XFRA IS AN OPEN
COLLECTOR THAT TURNS
ON WHEN OUTA IS ON
FOR OPERATING DUTY
RATIOS OF 50% THE PULSE
TRANSFORMER IS
CONNECTED DIRECTLY
BETWEEN OUTA AND XFRA
'DRES' RESETS THE PULSE
XFR DURING THE OFF
TIM E.
'DTO' PROVIDES A HIGH
CURRENT TURN OFF PATH
FOR THE GATE CHARGES
OF QS AND QF
Fig 3a. Driving a Pulse Transformer using XFRA and OUTA with < 50% duty ratio
2005 Semtech Corp.
11
www.semtech.com
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet SC4901.PDF ] | |
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