|
|
PDF IDT74ALVCH16260 Data sheet ( Hoja de datos )
| Número de pieza | IDT74ALVCH16260 | |
| Descripción | 3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de IDT74ALVCH16260 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
|
No Preview Available !
IDT74ALVCH16260
3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH
INDUSTRIALTEMPERATURERANGE
3.3V CMOS 12-BIT TO 24-BIT
MULTIPLEXED D-TYPE LATCH
WITH 3-STATE OUTPUTS
AND BUS-HOLD
IDT74ALVCH16260
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
www.Data•ShVeCeCt4=U2.c.o5mV ± 0.2V
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP and TSSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for heavy loads
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
This 12-bit to 24-bit multiplexed D-type latch is built using advanced dual
metal CMOS technology. The ALVCH16260 is used in applications in which
two separate data paths must be multiplexed onto, or demultiplexed from, a
singledatapath.Typicalapplicationsincludemultiplexingand/ordemultiplexing
address and data information in microprocessor or bus-interface applications.
This device also is useful in memory interleaving applications.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available
for address and/or data transfer. The output-enable (OE1B, OE2B, and OEA)
inputs control the bus transceiver functions. The OE1B and OE2B control
signals also allow bank control in the A-to-B direction. Address and/or data
information can be stored using the internal storage latches. The latch-enable
(LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control data storage.
When the latch-enable input is high, the latch is transparent. When the latch-
enable input goes low, the data present at the inputs is latched and remains
latched until the latch-enable input is returned high.
The ALVCH16260 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining speed
performance.
The ALVCH16260 has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
OE1B
LEA1B
29
30
LE1B
SEL
OEA
2
12
28
1
A1:12
1
M
12 U
X
0
A-1B
LATCH
1B-A
LATCH
12
12
12
1B1:12
27
LE2B
12
12
2B-A
LATCH
12
LEA2B
OE2B
55
56
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2004 Integrated Device Technology, Inc.
A-2B
LATCH
12
1
2B1:12
JANUARY 2004
DSC-4737/2
1 page  
IDT74ALVCH16260
3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH
INDUSTRIALTEMPERATURERANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
VOH Output HIGH Voltage
VCC = 2.3V to 3.6V
IOH = – 0.1mA
VCC = 2.3V
IOH = – 6mA
VCC = 2.3V
IOH = – 12mA
VCC = 2.7V
VCC = 3V
VCC = 3V
IOH = – 24mA
VOL OutputLOWVoltage
VCC = 2.3V to 3.6V
IOL = 0.1mA
VCC = 2.3V
IOL = 6mA
www.DataSheet4U.com
VCC = 2.7V
IOL = 12mA
IOL = 12mA
VCC = 3V
IOL = 24mA
Min. Max. Unit
VCC – 0.2
—
V
2—
1.7 —
2.2 —
2.4 —
2—
— 0.2 V
— 0.4
— 0.7
— 0.4
— 0.55
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OPERATING CHARACTERISTICS, TA = 25°C
Symbol
CPD
CPD
Parameter
Power Dissipation Capacitance Outputs enabled
Power Dissipation Capacitance Outputs disabled
Test Conditions
CL = 0pF, f = 10Mhz
VCC = 2.5V ± 0.2V
Typical
37
4
VCC = 3.3V ± 0.3V
Typical
41
7
Unit
pF
SWITCHING CHARACTERISTICS(1)
Symbol
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tW
tSK(O)
Parameter
Propagation Delay
Ax to 1Bx or Ax to 2Bx
Propagation Delay
1Bx to Ax or 2Bx to Ax
Propagation Delay
LEXB to Ax
Propagation Delay
LE1B to 1BX or LEA2B to 2Bx
Propagation Delay
SEL to Ax
Output Enable Time
OEA to Ax, OE1B to 1Bx, or OE2B to 2Bx
Output Disable Time
OEA to Ax, OE1B to 1Bx, or OE2B to 2Bx
Set-up Time, data before LE1B, LE2B, LEA1B, LEA2B
Hold Time, data after LE1B, LE2B, LEA1B, LEA2B
Pulse Width, LE1B, LE2B, LEA1B, or LEA2B HIGH
Output Skew(2)
VCC = 2.5V ± 0.2V
Min. Max.
1 5.4
1 5.4
1 5.6
1 5.6
1 6.9
1 6.7
1 5.7
1.4 —
1.6 —
3.3 —
——
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
5
VCC = 2.7V
Min. Max.
— 5.1
VCC = 3.3V ± 0.3V
Min. Max.
1.2 4.3
Unit
ns
— 5.1 1.2 4.3 ns
— 5.2 1 4.4 ns
— 5.2 1 4.4 ns
— 6.6 1.1 5.6 ns
— 6.4 1 5.4 ns
— 5 1.3 4.6 ns
1.1 — 1.1 — ns
1.9 — 1.5 — ns
3.3 — 3.3 — ns
— — — 500 ps
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet IDT74ALVCH16260.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| IDT74ALVCH16260 | 3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH | Integrated Device Technology |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |