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PDF LH155BA Data sheet ( Hoja de datos )

Número de pieza LH155BA
Descripción 128-Segment and 64-Common Outputs LCD Driver IC with A Built-in RAM
Fabricantes Sharp Electrionic Components 
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LH155BA
LH155BA
128-Segment and 64-Common Outputs
LCD Driver IC with A Built-in RAM
DESCRIPTION
The LH155BA is an LCD driver with a built-in RAM
suitable for driving medium/small scale dot-matrix
LCD panels, and which is capable of being directly
connected to the bus line of a microcomputer. The
LH155BA stores in the RAM the 8-bit parallel or
serial display data transferred from the
microcomputer and generates LCD drive signals.
Since the LH155BA features a bit-map type LCD
driver that one bit of data in the display RAM
corresponds to one dot in the LCD, there is a lot of
freedom in displaying. The LH155BA has 128
segment outputs and 64 common outputs in a
single chip, making it possible to create an LCD
system with the fewest number of the chips. The
LH155BA enables an LCD system for battery-
operated, hand-carrying information equipment by
securing lower power consumption and wider
operating voltage range.
FEATURES
• Graphic display output pin : 64 x 128 pins
• Segment display output pin : 3 x 12 pins
• Icon display output pin : 1 x 1 pin
• LCD display by graphic display RAM
– Normal mode : RAM data "0"/not lighted,
RAM data "1"/lighted
– Reverse mode : RAM data "1"/not lighted,
RAM data "0"/lighted
• Display RAM memory capacity
– 128 x 64 = 8 192 bits (For graphic display)
– 12 x 3 = 36 bits (For segment display)
– 1 x 1 = 1 bit (For icon display)
• General 8-bit MPU interface : Possible to directly
connect 80-family and 68-family MPUs to bus line
• Possible to make serial interface
• Ratio of display duty cycle :
1/16, 1/32, 1/48 or 1/64 (selectable by command)
• 128-bit automatic transfer from display RAM to
display data latch
• Abundant command functions
– Display data read/write
– Setting up LCD alternating signal cycle
– Setting up display starting-line : per line
– Display ON/OFF
– Display control of normal and reverse modes
– Increment control of display RAM address
– Write control of read modifying
– Internal register read
– Power saving mode
• LCD drive power circuit
– Built-in booster circuit : Two, three or four times
voltage boost is possible
– Built-in voltage converter : Generates LCD
drive voltages (V0, V1, V2, V3 and V4) based
on the boosted voltage
– Built-in power bias ratio : 1/7 or 1/9 bias
(selectable by command)
– Built-in electronic volume : Controllable in 16
steps
– Supply voltages
Logic system : +1.8 to +5.5 V
LCD drive system : +4.0 to +14.0 V
• Operating temperature : –30 to +85 ˚C
• Package : 260-pin TCP (Tape Carrier Package)
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
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LH155BA pdf
LH155BA
1.3. System Bus Pins
SYMBOL
I/O
DESCRIPTION
D7-D0
I/O 8-bit bi-directional data bus, connected to 8-bit MPU data bus.
CSB
I Chip selection input pin that decoded address bus signal is input.
Distinguishes display RAM data/commands of D7 to D0 data transferred from MPU.
RS I 0 : The data of D7 to D0 show the display RAM data.
1 : The data of D7 to D0 show the command data.
RESB
Initialized by setting to "L". The reset signals of the system are normally input. Reset
I
operation is performed in accordance with RESB signal level.
• In connecting to 80-family MPU :
This RDB is a pin for connecting the RDB signal of 80-family MPU. When the
RDB
(E)
signal enters in the "L" state, the data bus of this IC turns to the "output" state.
I • In connecting to 68-family MPU :
This RDB becomes a pin for connecting the enable clock signal of 68-family MPU.
When the signal enters in the "H" state, the data bus of this IC turns to the "active"
state.
• In connecting to 80-family MPU :
This WRB is a pin for connecting the WRB signal of 80-family MPU, and when
WRB signal is "L", this pin is "active".
WRB
(R/W)
The data bus signal is input at the rising edge of WRB signal.
I • In connecting to 68-family MPU :
This WRB becomes a pin for connecting the R/W signal of controlling read/write of
68-family MPU.
R/W = "H" : Read
R/W = "L" : Write
MPU interface-type shift pin.
M86 = "H" : 68-family interface
M86 I
M86 = "L" : 80-family interface
Fixed to either "H" or "L".
SDA
I Serial-data input pin at time of serial interface selection.
Serial clock pin at time of serial interface selection.
Used to shift the SDA data by using the rising edge of SCL.
SCL I Used to convert into 8-bit data by using the 8th clock at the rising edge of SCL in
serial-to-parallel data processing.
After data-transferring, or when making no access, be sure to set to "L".
Used to shift between parallel interface and serial interface.
P/S Chip selection Data identification Data Read/Write Serial clock
H CSB
RS
D7-D0 RDB, WRB
P/S
I
L CSB
RS SDA Write only SCL
P/S = "H" for parallel input. Fix SDA and SCL pins to either "H" or "L".
P/S = "L" for serial input. Fix D7 to D0 pins to High-Z, RDB and WRB pins to either
"H" or "L".
TEST
I For testing. Fix to "L".
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LH155BA arduino
LH155BA
2.1.3. DATA IDENTIFICATION
The LH155BA can identify the data of 8-bit data bus
by combinations of RS, RDB and WRB signals.
68-FAMILY
80-FAMILY
RS
R/W
RDB
WRB
FUNCTION
1 1 0 1 Reads from internal register
1 0 1 0 Writes to internal register
0 1 0 1 Reads from display data RAM
0 0 1 0 Writes to display data RAM
2.1.4. SERIAL INTERFACE
The serial interface of LH155BA can accept inputs
of SDA and SCL in the chip selection state (CSB =
"L"). When not in the chip selection state, the
internal shift register and counter are reset to their
initial condition.
Serial data SDA are input sequentially in order of
D7 to D0 at the rising edge of serial clock (SCL)
and are converted into 8-bit parallel data (by serial
to parallel conversion) at the rising edge of the 8th
serial clock, being processed in accordance with
the data. The identification whether the serial data
inputs (SDA) are display data or commands is
judged by input to RS pin.
RS = "L" : Display data
RS = "H" : Commands
After completing 8-bit data transferring, or when
making no access, be sure to set serial clock input
(SCL) to "L".
Protection of SDA and SCL signals against external
noise should be taken in actual wiring. To prevent
the successive recognition errors of transferring
data from external noise, release the chip selection
state (CSB = "H") at every completion of 8-bit data
transferring.
CSB
RS
SDA
SCL
Valid
D7 D6 D5 D4 D3 D2 D1 D0
12 34 5 6 78
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