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PDF TH50VSF2581AASB Data sheet ( Hoja de datos )

Número de pieza TH50VSF2581AASB
Descripción (TH50VSF2580AASB / TH50VSF2581AASB) SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE
Fabricantes Toshiba Semiconductor 
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TH50VSF2580/2581AASB
TENTATIVE TOSHIBA MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS
SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE
DESCRIPTION
The TH50VSF2580/2581AASB is a mixed multi-chip package containing a 4,194,304-bit full CMOS SRAM and a
33,554,432-bit flash memory. The CIOS and CIOF inputs can be used to select the optimal memory configuration.
The power supply for the TH50VSF2580/2581AASB can range from 2.7 V to 3.6 V. The TH50VSF2580/2581AASB
can perform simultaneous read/write operations on its flash memory and is available in a 69-pin BGA package,
making it suitable for a variety of applications.
FEATURES
Power supply voltage
VCCs = 2.7 V~3.6 V
www.DataSheet4U.cDoamVtCaCrfet=e2n.t7ioVn~s3u.6ppVly voltage
VCCs = 1.5 V~3.6 V
Current consumption
Operating: 45 mA maximum (CMOS level)
Standby: 7 µA maximum (SRAM CMOS level)
Standby: 10 µA maximum (flash CMOS level)
Block erase architecture for flash memory
8 blocks of 8 Kbytes
63 blocks of 64 Kbytes
Organization
CIOF CIOS
Flash Memory
SRAM
VCC
VCC
VSS
VCC
VSS
VSS
2,097,152 words of 16 bits
2,097,152 words of 16 bits
4,194,304 words of 8 bits
262,144 words of 16 bits
524,288 words of 8 bits
524,288 words of 8 bits
Function mode control for flash memory
Compatible with JEDEC-standard commands
Flash memory functions
Simultaneous Read/Write operations
Auto-Program
Auto Chip Erase, Auto Block Erase
Auto Multiple-Block Erase
Program Suspend/Resume
Block-Erase Suspend/Resume
Data Polling / Toggle Bit function
Block Protection / Boot Block Protection
Support for automatic sleep and hidden ROM area
Common flash memory interface (CFI)
Byte/Word Modes
Erase and Program cycles for flash memory
105 cycles (typical)
Boot block architecture for flash memory
TH50VSF2580AASB: Top boot block
TH50VSF2581AASB: Bottom boot block
Package
P-FBGA69-1209-0.80A3: 0.31 g (typ.)
PIN ASSIGNMENT (TOP VIEW)
PIN NAMES
CIOF = VCC, CIOS = VCC (×16, ×16)
1 2 3 4 5 6 7 8 9 10
A NC
NC
B NC
NC
C NC
A7 LB WP/ACC WE A8 A11
D A3 A6 UB RESET CE2S A19 A12 A15
E A2 A5 A18 RY/BY A20 A9 A13 NC
F NC A1 A4 A17
A10 A14 NC NC
G NC A0 VSS DQ1
H CEF OE DQ9
DQ3
DQ6 DU A16 NC
DQ4 DQ13 DQ15 CIOF
J CE1S DQ0 DQ10 VCCf VCCs DQ12 DQ7 VSS
K DQ8 DQ2 DQ11 CIOS DQ5 DQ14
L NC
NC
M NC
NC
A0~A21 Address inputs
A12S
A12 input for SRAM
A12F
A12 input for flash memory
SA A18 input for SRAM
DQ0~DQ15 Data inputs/outputs
CE1S , CE2S Chip Enable inputs for SRAM
CEF
Chip Enable input for flash memory
OE Output Enable input
WE Write Enable input
LB , UB Data byte control input
RY/BY
Ready/Busy output
RESET Hardware reset input
WP/ACC Write Protect / Program Acceleration input
CIOS
Word Enable input for SRAM
CIOF
Word Enable input for flash memory
VCCs
VCCf
VSS
NC
Power supply for SRAM
Power supply for flash memory
Ground
Not connected
DU Do not use
000707EBA2
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
2001-10-26 1/50

1 page




TH50VSF2581AASB pdf
TH50VSF2580/2581AASB
COMMAND SEQUENCES
COMMAND
SEQUENCE
BUS
WRITE
CYCLES
REQ’D
FIRST BUS
WRITE CYCLE
Addr. Data
SECOND BUS
WRITE CYCLE
Addr. Data
THIRD BUS
WRITE CYCLE
Addr. Data
FOURTH BUS
WRITE CYCLE
Addr.
Data
FIFTH BUS
SIXTH BUS
WRITE CYCLE WRITE CYCLE
Addr. Data Addr. Data
Read/Reset
1 XXXH F0H
Read/Reset
ID Read
Word
Byte
Word
Byte
3
3
555H
AAAH
AAH
2AAH
555H
555H
AAAH
AAH
2AAH
555H
555H
55H F0H
AAAH
BK(3) +
555H
55H BK(3) + 90H
AAAH
(1)
RA
(4)
IA
(2)
RD
(5)
ID
Word
www.DataSheet4U.cAoumto-Program Byte
Program Suspend
Program Resume
4
1
1
555H
2AAH
AAH
55H
555H
A0H
(6)
PA
AAAH
555H
AAAH
BK(3) B0H
BK(3) 30H
(7)
PD
Auto Chip
Erase
Word
Byte
6
555H
2AAH
555H
555H
AAH 55H 80H
AAAH
555H
AAAH
AAAH
AAH
2AAH
555H
55H 10H
555H
AAAH
Auto Block
Erase
Word
Byte
Block Erase Suspend
Block Erase Resume
Block Protect
Verify Block
Protect
Word
Byte
6
1
1
4
3
555H
2AAH
555H
555H
AAH 55H 80H
AAAH
555H
AAAH
AAAH
AAH
2AAH
(8)
55H BA
30H
555H
BK(3) B0H
BK(3) 30H
XXXH 60H BPA(9) 60H XXXH 40H BPA(9) BPD(10)
555H
AAAH
AAH
2AAH
555H
BK(3) +
555H
(9) (10)
55H BK(3) + 90H BPA
BPD
AAAH
Fast Program
Set
Word
Byte
Fast Program
Fast Program Reset
3
2
2
555H
AAAH
XXXH
XXXH
AAH
A0H
90H
2AAH
555H
PA(6)
XXXH
55H
PD(7)
F0H(13)
555H
AAAH
20H
Hidden ROM
Mode Entry
Word
Byte
3
555H
2AAH
555H
AAH 55H 88H
AAAH
555H
AAAH
Hidden ROM
Program
Word
Byte
4
555H
2AAH
AAH
55H
555H
A0H
(6)
PA
AAAH
555H
AAAH
(7)
PD
Hidden ROM
Erase
Word
Byte
6
555H
2AAH
555H
555H
AAH 55H 80H
AAAH
555H
AAAH
AAAH
AAH
2AAH
(8)
55H BA
30H
555H
Hidden ROM
Mode Exit
Word
Byte
4
555H
2AAH
555H
AAH 55H 90H XXXH
AAAH
555H
AAAH
Query
Command
BK(3) +
Word
55H (11) (12)
2 BK(3) + 98H CA
CD
Byte
AAH
00H
Notes: The system should generate the following address patterns:
Word Mode: 555H or 2AAH on address pins A10~A0
Byte Mode: AAAH or 555H on address pins A10~A0, A12F
DQ8~DQ15 are ignored in Word Mode.
Byte mode when VIL is inputted to CIOF, and addresses
are A21~A0
Write mode when VIH is inputted to CIOF, and addresses
are A20~A0
(1) RA: Read Address
Valid addresses are A10~A0 when a command is entered.
(2) RD: Read Data
(6) PA: Program Address
(3) BK: Bank Address = A20~A15
(7) PD: Program Data
(4) IA: Bank Address and ID Read Address (A6, A1, A0) (8) BA: Block Address = A20~A12
Bank Address = A20~A15
(9) BPA: Block Address and ID Read Address (A6, A1, A0)
Manufacturer Code = (0, 0, 0)
Block Address = A20~A12
Device Code = (0, 0, 1)
(5) ID: ID Data
0098H - Manufacturer Code
009AH - Device Code (TH50VSF2580AASB)
009CH - Device Code (TH50VSF2581AASB)
0001H - Protected Block
ID Read Address = (0, 1, 0)
(10) BPD: Verify Data
(11) CA: CFI Address
(12) CD: CFI Data
(13) F0H: 00H is valid too
2001-10-26 5/50

5 Page





TH50VSF2581AASB arduino
TH50VSF2580/2581AASB
BANK
#
BK8
www.DataSheet4U.com
BLOCK
#
BA63
BA64
BA65
BA66
BA67
BA68
BA69
BA70
BLOCK ADDRESS
BANK ADDRESS
ADDRESS RANGE
A20 A19 A18 A17 A16 A15 A14 A13 A12
BYTE MODE
WORD MODE
H H H L L L * * * 380000H~38FFFFH 1C0000H~1C7FFFH
H H H L L H * * * 390000H~39FFFFH 1C8000H~1CFFFFH
H H H L H L * * * 3A0000H~3AFFFFH 1D0000H~1D7FFFH
H H H L H H * * * 3B0000H~3BFFFFH 1D8000H~1DFFFFH
H H H H L L * * * 3C0000H~3CFFFFH 1E0000H~1E7FFFH
H H H H L H * * * 3D0000H~3DFFFFH 1E8000H~1EFFFFH
H H H H H L * * * 3E0000H~3EFFFFH 1F0000H~1F7FFFH
H H H H H H * * * 3F0000H~3FFFFFH 1F8000H~1FFFFFH
2001-10-26 11/50

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