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PDF M123A10BXB561KS Data sheet ( Hoja de datos )

Número de pieza M123A10BXB561KS
Descripción Ceramic High-Reliability Capacitor
Fabricantes Kemet Electronics 
Logotipo Kemet Electronics Logotipo



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www.DataSheet4U.com
®
CERAMIC
HIGH-RELIABILITY
GR900 SERIES
& MIL-C-123
CAPACITORS
F-3054E 5/04

1 page




M123A10BXB561KS pdf
CERAMIC HIGH RELIABILITY MOLDED & CHIPS
GENERAL INFORMATION MIL-C-123
INTRODUCTION
MIL-C-123 specification covers the general requirements for high
reliability, general purpose (BX) and temperature stable (BP) ceramic
dielectric fixed capacitors for space, missile, and other high reliability
applications. Capacitors covered by MIL-C-123 may be used in criti-
cal frequency determining applications, timing circuits, and other
applications where absolute stability is required (BP) and in applica-
tions where appreciable variations in capacitance with respect to
temperature, voltage, frequency, and life can be tolerated (BX).
SCREENING TESTS
Each lot has the following In-Process Inspections performed:
1. 100% Ultrasonic Scan
2. n-Process Destructive Physical Analysis
3. 100% visual inspection at a minimum of 10X magnification
4. Pre-encapsulation terminal strength evaluation (leaded devices
only). Radial leaded capacitors must meet a minimum lead pull
www.DataSheet4U.comof 1.8 kg (4.0 lbs.).
The following Group A shall be performed on each lot:
1. Thermal Shock—Performed in accordance to MIL-STD-202,
Method 107, Condition A, with step 3 being 125°C. Number of
cycles shall be 20 (100% of lot).
2. Voltage Conditioning—The voltage conditioning shall consist
of applying twice the rated voltage to the units at the maximum
rated temperature of 125°C for a minimum of 168 hours and a
maximum of 264 hours. The voltage conditioning may be termi-
nated at any time during 168 hours to 264 hours time interval
that confirmed failures meet the requirements for the PDA dur-
ing the last 48 hours listed in Table I below (100% of lot).
Optional Voltage Conditioning (Accelerated Voltage
Conditioning)—AII conditions of the standard voltage condi-
tioning apply with the exception of the increased voltage and the
decreased test time. (Refer to Mil-C-123 for formula.)
*Step 5 is performed on chips at this point (100% of lot).
3. Dielectric Withstanding Voltage 250% of the dc rated voltage
at 25°C (100% of lot).
4. Insulation Resistance—The 25°C measurement with rated
voltage applied shall be the lesser of 100,000 megohms or 1000
megohm-microfarads (100% of lot).
*5.Insulation Resistance—The 125°C measurement with rated
voltage applied shall be the lesser of 10,000 megohms or 100
megohm-microfarads (1000% of lot). For chips 125°C IR is per-
formed prior to step 3 above.
6. Capacitance must be within specified tolerance at 25°C (100%
of lot). Cap Exclusion: Capacitance values no more than 5% or
.5 pF, whichever is greater, for BX characteristics or 1% or .3 pF,
whichever is greater, for BP characteristics beyond specified
tolerance limit shall be removed from the lot but shall not be con-
sidered defective for determination of the PDA.
7. Dissipation Factor shall not exceed 2.5% for X dielectric,
0.15% for G dielectric at 25°C (100% of lot).
8. Percent Defective Allowable (PDA). The following table lists
the PDA requirements for MIL-C-123 Group A:
KEMET
STYLE
C052Z
C062Z
C512Z
C0805Z
C1210Z
C1808Z
C2225Z
MIL
STYLE
CKS05
CKS06
CKS07
CKS51
CKS52
CKS53
CKS54
TABLE I
BURN IN PDA
LAST 48 HOURS
1 unit or 0.1%
1 unit or 0.2%
1 unit or 0.2%
1 unit or 0.1%
1 unit or 0.1%
1 unit or 0.1%
1 unit or 0.1%
PDA
OVERALL
3%
5%
5%
3%
3%
3%
3%
9. Radiographic Inspection (leaded devices only) (100% of lot).
10. Visual Inspection per MIL-C-123 criteria.
11. Destructive Physical Analysis per EIA-469 and MIL-C-123.
SAMPLE TESTS
The following Group B tests shall be performed on samples from
each lot, which have been subjected to and have passed Group A
inspection.
1. Thermal Shock—Performed in accordance to MIL-STD-202,
Method 107, Condition A, with step 3 being 125°C. Number of
cycles shall be 100.
2. Life Test per MIL-5TD-202, Method 108. Test temperature and
tolerance is +125°C +4, -0°C. Capacitors shall be subjected to
2X rated voltage for 1000 hours.
3. Humidity, steady state, low voltage per MIL-STD-202,
Method 103, Condition A. Capacitors shall be subjected to an
environment of 85°C with 85% relative humidity for 240 hours
minimum. Cycling shall not be performed. A dc potential of 1.3
±0.25 volts shall be applied continuously through a 100,000
ohm resistance to each device under test. At completion, 25°C
IR and Cap are read.
4. Voltage-temperature limits—Capacitance is measured at var-
ious temperatures (-55°C to +125°C) with and without rated
voltage.
5. Moisture Resistance per MIL-STD-202, Method 106. There
shall be 20 continuous cycles. During the first 10 cycles only, a
dc potential of 50 volts shall be applied across the capacitor ter-
minals. Once each day, a check shall be performed to deter-
mine whether a capacitor has shorted. Vibration cycle of MIL-
STD-202, Method 106, Step 7b shall not be performed. Upon
completion of MIL-STD-202, Method 106, Step 6 of the final
cycle, capacitors shall be measured for capacitance, dielectric
withstanding voltage and insulation resistance.
The following Group C tests shall be performed on samples selected
from lots that have passed Group A and have been submitted for
Group B inspection. Samples shall be selected every two months.
1. Terminal Strength
2. Solderability
3. Resistance to Soldering Heat
4. Solvent Resistance (Leaded devices only)
All lots shipped must have been subjected to and passed Group A
and B testing.
STANDARD PACKAGING FOR
MIL-C-123 IS AS FOLLOWS:
C052Z tray
C0805Z
C062Z tray
C1210Z
C512Z 1 pc. per bag
C1808Z
C2225Z
chip tray
chip tray
chip tray
chip tray
DATA PACKAGE
A data package is sent with each shipment which contains:
1. Summary of Group A testing
2. Summary of Group B testing
3. Group B Variables Test Data
4. Lead Pull Data (Leaded Devices Only)
5. Final Destructive Physical Analysis Report
6. Certificate of Compliance stating that the ceramic capacitors
supplied meet all the requirements of MIL-C-123, the applicable
slash sheet(s) and all associated documents.
KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300
5

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M123A10BXB561KS arduino
CERAMIC HIGH RELIABILITY
GENERAL INFORMATION GR900 SERIES
HIGH RELIABILITY — GR900
GR900 capacitors are intended for use in any application where
the chance of failure must be reduced to the lowest possible
level. While any well-made multilayer ceramic capacitor is an
inherently reliable device, GR900 capacitors receive special
attention in all phases of manufacture including:
— Raw Materials Selection
— Special Designs
— Clean Room Production
— Individual Batch Testing
— Ultrasonic Scanning (when applicable)
— Singular Batch Identity is Maintained
— Destructive Physical Analysis
www.DataSheet4UT.hceosme parts are well worth the added investment in comparison
to the cost of a device or system failure.
Typical applications include:
1. Medical: heart pacemakers, pain control devices, life signs
monitoring, eyesight improvement and electroencephalographic
equipment.
2. Aerospace: space exploration (Viking, Apollo, Venus Lander,
etc.); Communications Satellites; Space Shuttle/IUS; Sky Lab.
SCREENING AND SAMPLE TESTS
Each batch receives the following testing/inspections:
Preliminary:
1. Destructive Physical Analysis: (DPA) - A sample is pulled from
each lot and examined per EIA-469 and KEMET’s strict internal
void and delamination criteria. Sampling plan is per MIL-C-123.
2. Ultrasonic Scanning - May be performed on batches failing to
meet the DPA criteria for removal of marginal product. Not
required on each lot.
Group A
1. Thermal Shock — Materials used in the construction of mul-
tilayer ceramic capacitors possess various thermal coefficients of
expansion. To assure maximum uniformity, each part is temper-
ature cycled in accordance to MIL-STD-202, Method 107,
Condition A with Step 3 being 125°C. Number of cycles shall be
20 (100% of lot).
2. Voltage Conditioning — One of the most strenuous environ-
ments for any capacitor is the high temperature/high voltage test.
All units are subject to twice-rated voltage to the units at the max-
imum rated temperature of 125°C for a minimum of 168 hours
and a maximum of 264 hours. The voltage conditioning may be
terminated at any time during 168 hours to 264 hours time inter-
val that confirmed failures meet the requirements of the PDA dur-
ing the last 48 hours of 1 unit or .4% (100% of lot).
Optional Voltage Conditioning (Accelerated Voltage
Conditioning) — All conditions of the standard voltage condi-
tioning apply with the exception of increased voltage and
decreased test time. Refer to MIL-C-123 for the proper formula.
*Step 5 is performed on chips at this point (100% of lot).
3. Dielectric Withstanding Voltage — 250% of the dc rated volt-
age at 25°C (100% of lot).
4. Insulation Resistance — The 25°C measurement with rated
voltage applied shall be the lesser of 100,000 megohms or 1000
megohm-microfarads (100% of lot).
*5. Insulation Resistance — The 125°C measurement with
rated voltage applied shall be the lesser of 10,000 megohms or
100 megohm-microfarads (100% of lot). For chips, 125°C IR is
performed prior to Step 3 above.
6. Storage at 150°C for 2 hours minimum without voltage applied
followed by a 12-hour minimum stabilization period (temperature
characteristic BX only).
7. Capacitance — Shall be within specified tolerance at 25°C
(100% of lot). (Aging phenomenon is taken into account for BX
dielectric to obtain capacitance.)
8. Dissipation Factor — Shall not exceed 2.5% for X7R (BX)
dielectric, 0.15% for NPO (BP) dielectric at 25°C. (100% of lot.)
9. Percent Defective Allowable (PDA) — The overall PDA is 8%
for parts outside the MIL-C-123 values. The PDA is per MIL-C-
123 for all parts that are valid MIL-C-123 values. The PD
includes steps 1 through 8 above with the following exceptions.
Capacitance exclusion - capacitance values no more than 5% or
.5pF, whichever is greater for BX characteristic or 1% or .3pF,
whichever is greater for BP characteristic beyond specified toler-
ance limit, shall be removed from the lot but shall not be consid-
ered defective for determination of the PD.
Insulation Resistance at 25°C — Product which is not acceptable
for twice the military limit but is acceptable per the military limit,
is removed from the lot but shall not be considered defective for
determination of the PD.
10. Visual and Mechanical Examination — Performed per MIL-
C-123 criteria.
11. Radiographic Examination (Leaded Devices Only)
Radial devices receive a one-plane X-ray.
12. Destructive Physical Analysis (DPA) — A sample is exam-
ined on each lot per EIA-469. Sampling Plan is per MIL-C-123.
STANDARD PACKAGING
All products are packaged in trays except C512 capacitors which
are packaged 1 piece per bag.
DATA PACKAGE
A data package is sent with each shipment which contains:
1. Final Destructive Physical Analysis (DPA) report.
2. Certificate of Compliance stating that the parts meet all applic-
able requirements of the appropriate military specification to the
best failure level to which KEMET is approved.
KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300
11

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