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PDF 39VF080 Data sheet ( Hoja de datos )
| Número de pieza | 39VF080 | |
| Descripción | SST39VF080 | |
| Fabricantes | SST | |
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8 Mbit (x8) Multi-Purpose Flash
SST39LF080 / SST39VF080
FEATURES:
SST39LF/VF0803.0 & 2.7V 8Mb (x8) MPF memories
EOL Data Sheet
• Organized as 1M x8
• Single Voltage Read and Write Operations
– 3.0-3.6V for SST39LF080
– 2.7-3.6V for SST39VF080
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
www.DataSheet4U(.ctyompical values at 14 MHz)
– Active Current: 12 mA (typical)
– Standby Current: 4 µA (typical)
– Auto Low Power Mode: 4 µA (typical)
• Sector-Erase Capability
– Uniform 4 KByte sectors
• Block-Erase Capability
– Uniform 64 KByte blocks
• Fast Read Access Time:
– 55 ns for SST39LF080
– 70 and 90 ns for SST39VF080
• Latched Address and Data
• Fast Erase and Byte-Program:
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Byte-Program Time: 14 µs (typical)
– Chip Rewrite Time:
15 seconds (typical) for SST39LF/VF080
• Automatic Write Timing
– Internal VPP Generation
• End-of-Write Detection
– Toggle Bit
– Data# Polling
• CMOS I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pinouts and command sets
• Packages Available
– 40-lead TSOP (10mm x 20mm)
– 48-ball TFBGA (6mm x 8mm)
PRODUCT DESCRIPTION
The SST39LF/VF080 devices are 1M x8 CMOS Multi-Pur-
pose Flash (MPF) manufactured with SST’s proprietary,
high-performance CMOS SuperFlash technology. The
split-gate cell design and thick-oxide tunneling injector
attain better reliability and manufacturability compared with
alternate approaches. The SST39LF080 write (Program or
Erase) with a 3.0-3.6V power supply. The SST39VF080
write (Program or Erase) with a 2.7-3.6V power supply.
They conform to JEDEC standard pinouts for x8 memories.
Featuring high performance Byte-Program, the SST39LF/
VF080 devices provide a typical Byte-Program time of 14
µsec. The devices use Toggle Bit or Data# Polling to indi-
cate the completion of Program operation. To protect
against inadvertent write, they have on-chip hardware and
Software Data Protection schemes. Designed, manufac-
tured, and tested for a wide spectrum of applications,
these devices are offered with a guaranteed typical
endurance of 10,000 cycles. Data retention is rated at
greater than 100 years.
The SST39LF/VF080 devices are suited for applications
that require convenient and economical updating of pro-
gram, configuration, or data memory. For all system appli-
cations, they significantly improve performance and
reliability, while lowering power consumption. They inher-
ently use less energy during Erase and Program than alter-
native flash technologies. The total energy consumed is a
function of the applied voltage, current, and time of applica-
tion. Since for any given voltage range, the SuperFlash
technology uses less current to program and has a shorter
erase time, the total energy consumed during any Erase or
Program operation is less than alternative flash technolo-
gies. They also improve flexibility while lowering the cost for
program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and Pro-
gram times, independent of the number of Erase/Program
cycles that have occurred. Therefore the system software
or hardware does not have to be modified or de-rated as is
necessary with alternative flash technologies, whose Erase
and Program times increase with accumulated Erase/Pro-
gram cycles.
To meet high density, surface mount requirements, the
SST39LF/VF080 are offered in 40-lead TSOP and 48-
ball TFBGA packages. See Figures 1 and 2 for pin
assignments.
©2007 Silicon Storage Technology, Inc.
S71146-07-EOL
6/07
1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
MPF is a trademark of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.
1 page  
8 Mbit Multi-Purpose Flash
SST39LF080 / SST39VF080
www.DataSheet4U.com
A16
A15
A14
A13
A12
A11
A9
A8
WE#
NC
NC
NC
A18
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Standard Pinout
Top View
Die Up
FIGURE 1: Pin Assignments for 40-lead TSOP
40 A17
39 VSS
38 NC
37 A19
36 A10
35 DQ7
34 DQ6
33 DQ5
32 DQ4
31 VDD
30 VDD
29 NC
28 DQ3
27 DQ2
26 DQ1
25 DQ0
24 OE#
23 VSS
22 CE#
21 A0
1146 F01.3
TOP VIEW (balls facing down)
6
A14 A13 A15 A16 A17 NC NC VSS
5
A9 A8 A11 A12 A19 A10 DQ6 DQ7
4
WE# NC NC NC DQ5 NC VDD DQ4
3
NC NC NC NC DQ2 DQ3 VDD NC
2
A7 A18 A6 A5 DQ0 NC NC DQ1
1
A3 A4 A2 A1 A0 CE# OE# VSS
ABCDEFGH
FIGURE 2: Pin Assignments for 48-ball TFBGA
EOL Data Sheet
©2007 Silicon Storage Technology, Inc.
5
S71146-07-EOL
6/07
5 Page 
8 Mbit Multi-Purpose Flash
SST39LF080 / SST39VF080
AC CHARACTERISTICS
EOL Data Sheet
TABLE 12: READ CYCLE TIMING PARAMETERS
VDD = 3.0-3.6V FOR SST39LF080 AND 2.7-3.6V FOR SST39VF080
SST39LF080-55
SST39VF080-70
SST39VF080-90
Symbol Parameter
Min Max Min Max Min Max Units
TRC Read Cycle Time
55 70 90 ns
TCE Chip Enable Access Time
55 70 90 ns
TAA Address Access Time
www.DataSheet4TUO.Ecom Output Enable Access Time
55 70 90 ns
30 35 45 ns
TCLZ1 CE# Low to Active Output
0
0
0 ns
TOLZ1 OE# Low to Active Output
0
0
0 ns
TCHZ1 CE# High to High-Z Output
15 20 30 ns
TOHZ1 OE# High to High-Z Output
15 20 30 ns
TOH1 Output Hold from Address Change
0
0
0 ns
T12.4 1146
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 13: PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol Parameter
Min Max Units
TBP Byte-Program Time
TAS Address Setup Time
TAH Address Hold Time
20 µs
0 ns
30 ns
TCS
TCH
TOES
WE# and CE# Setup Time
WE# and CE# Hold Time
OE# High Setup Time
0 ns
0 ns
0 ns
TOEH
TCP
TWP
TWPH1
TCPH1
TDS
TDH1
TIDA1
TSE
OE# High Hold Time
CE# Pulse Width
WE# Pulse Width
WE# Pulse Width High
CE# Pulse Width High
Data Setup Time
Data Hold Time
Software ID Access and Exit Time
Sector-Erase
10 ns
40 ns
40 ns
30 ns
30 ns
30 ns
0 ns
150 ns
25 ms
TBE
TSCE
Block-Erase
Chip-Erase
25 ms
100 ms
T13.0 1146
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2007 Silicon Storage Technology, Inc.
11
S71146-07-EOL
6/07
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet 39VF080.PDF ] | |
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