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PDF T6A04A Data sheet ( Hoja de datos )

Número de pieza T6A04A
Descripción Column and Row Driver LSI
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! T6A04A Hoja de datos, Descripción, Manual

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
T6A04A
Column and Row Driver LSI for a Dot Matrix Graphic LCD
T6A04A
The T6A04A is a driver for a small-to-medium-sized scale dot
matrix graphic LCD. It includes the functions of the T9841B
(column driver) and the T9842B (row driver). It has an 8-bit
interface circuit and can be operated with an 80-Series MPU. It
generates all the timing signals for the display with an on-chip
www.DataSheeto4sUc.iclolamtor. It receives 8-bit data from an MPU, latches the data to
an on-chip RAM, and displays the image on the LCD (the data in
the display RAM correspond to the dots on the display). The
device has 120 column driver outputs and 64 row driver outputs
enabling it to drive a 120-dot by 64-dot LCD. In addition, there
are resistors to divide the bias voltage, a power supply op-amp,
DC-DC converter (+5 V →−5 V) and contrast control circuit,
enabling the LCD to be driven by a single power supply. The
device can be connected to another T6A04A to drive a 240-dot by
64-dot LCD.
Unit: mm
T6A04A
Lead Pitch
IN OUT
(UAW, 6NS) 1.0 0.28
(UEM, 7NS)
0.4
0.4
Please contact Toshiba or an authorized
Toshiba dealer for information on package
dimensions.
TCP (Tape Carrier Package)
Features
· On-chip display RAM capacity
: 120 × 64 = 7.5 kbits
· Display RAM data
(1) Display data = 1.................. LCD turns on.
(2) Display data = 0.................. LCD turns off.
· 1/64 duty cycle
· Word length of display data can be switched between eight bits and six bits according to the character font.
· LCD driver outputs
: 120 column driver outputs and 64 row driver outputs
· Interface with 80-series MPU
· On-chip oscillator with one external resistor
· Low power consumption
· On-chip resistors to divide bias voltage, on-chip operational amplifier for LCD supply, on-chip DC-DC converter,
on-chip contrast control circuit
· CMOS process
· Operating voltage
: 4.5 to 5.5 V
· Operating voltage for LCD drive signal : VDD VEE = 16.0 V (max)
· Package
: TCP (tape carrier package)
1 2002-03-06

1 page




T6A04A pdf
Pin Name
M/S
OSC1, OSC2
R1, R2
www.DataSheet4U.com
C1, C2
VIN
VOUT
VEE
VLC1 to VLC5
VDD
VSS
PM
/f
T6A04A
I/O Functions
Input
¾
¾
Input for master/slave selection
M/S = H ® T6A04A is master chip.
M/S = L ® T6A04A is slave chip.
When using the internal clock oscillator, connect a resistor between OSC1 and OSC2.
When using an external clock, connect the clock as input to OSC1 and leave OSC2 open.
Input for LCD drive bias selection
LCD drive bias selection is shown in the following
table
R2 R1 Bias
0 0 1/6
0 1 1/7
1 0 1/8
1 1 1/9
¾ Connected by a capacitor for DC-DC converter
¾ Input for DC-DC converter. Connect to VDD.
¾ DC-DC converter output
Power supply for LCD driver circuit
¾
When using on-chip DC-DC converter, connect VEE to VOUT
Power supply for LCD driver circuit
¾ M/S = H ® bias voltage output
M/S = L ® bias voltage input
¾ Power supply for logic circuit
¾ Ground: Reference
¾ Pre-frame signal for Toshiba T9841B
¾ Output system clock for Toshiba T9841B
5 2002-03-06

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T6A04A arduino
T6A04A
· Display RAM
The display RAM consists of 64 rows ´ 120 columns for a total of 7680 cells. It is directly bit-mapped to the
LCD. The relation between the display RAM and LCD is shown in Figure 8.
When the word length is set to eight bits, the display RAM is arranged in 15 pages and each page contains 64
words. When the word length is set to six bits, the display RAM is arranged in 20 pages and each page contains
64 words. See Figure 8.
COM1
COM2
www.DataSheet4U.com
COM64
120 ´ 64 dot LCD
XAD0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
XAD1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
XAD63
120 ´ 64 bit DISPLAY RAM
Figure 8
(1) 8-bits-per-word mode
XAD0
XAD1
PAGE0
D7 D0
PAGE1
X-Address
PAGE2 Y- (page) Address PAGE13 PAGE14
XAD62
XAD63
(2) 6-bits-per-word mode
XAD0
XAD1
PAGE0 PAGE1
D5 D0
PAGE2
X-Address
XAD62
XAD63
Y- (page) Address
Figure 9
11
PAGE18 PAGE19
2002-03-06

11 Page







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