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PDF T6B70BFG Data sheet ( Hoja de datos )

Número de pieza T6B70BFG
Descripción Interface IC
Fabricantes Toshiba Semiconductor 
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No Preview Available ! T6B70BFG Hoja de datos, Descripción, Manual

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
T6B70BFG
T6B70BFG
Interface IC for Hot Water Dispensers
The T6B70BFG is designed to be used mainly as an interface IC
for communication between hot water dispensers and the
corresponding controller unit, and comes equipped with a two
channel 4-bit D/A converter, pseudo sine wave generator and an
external analog signal detection circuit.
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Features
Built-in two channel 4-bit D/A converter (opposite polarities)
Built-in pseudo sine wave generator
(external clock 1/16 frequency divider)
Built-in external analog signal detection/non-detection circuit
Built-in two channel analog switch
Block Diagram
Weight: 0.16 g (typ.)
OSCIN 1
OSCOUT 2
FOUT 3
/SCTL 4
SW1IN 14
SW1OUT 15
SW2IN 11
SW2OUT 10
/RESET 5
16
frequency
divider unit
Modulation
control
circuit
Reset
circuit
Pseudo
0°C
sine wave
generator 180°C
Waveform
initialization block
4-bit D/A
converter
4-bit D/A
converter
13 SOUT+
12 SOUT
16 VDD
Zero crossing
waveform
shaping circuit
Amp input
circuit
Cycle measurement
counter
Detection/non-detection
judgment circuit
Output buffer
7 AMPIN
6 AMPOUT
8 VSS
9 /DOUT
Pin Assignment Diagram
OSCIN 1
OSCOUT 2
16VDD
15SW1OUT
FOUT 3
14SW1IN
/SCTL 4 T6B70BFG 13SOUT+
/RESET 5
12SOUT
AMPOUT 6
11 SW2IN
AMPIN 7
10SW2OUT
VSS 8
9 /DOUT
1
2007-07-19

1 page




T6B70BFG pdf
T6B70BFG
3. Transmission block function and timing
When the modulation control input (/SCTL) is in High-level, the pseudo sine wave output is held at 0° phase
of the pseudo sine wave. When the modulation control input changes from High-level to Low-level, the
pseudo sine wave output (SOUT+) initially outputs from -90° (SOUToutputs from +90°).
The time required to turn ON in this case is as follows:
td (ON) < 500 ns
When modulation control input changes from Low-level to High-level, the phase is forcibly held at 0° (the
pseudo sine wave output is stopped), regardless of the phase of the pseudo sine wave output. The time
required to turn OFF in this case is as follows:
td (OFF) < 1 μs
/SCTL
~~
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td (ON)
SOUT+ pseudo sine wave output
(SOUTis the opposite polarity)
~~
td (OFF)
4. Reception block function and timing
Once it is okay to receive the amplifier input signal, the time it takes for the /DOUT pin to changes from
High to Low (T (DET)) is about 9 to 15 waves (based on Fosc 1/16 frequency). This condition is only valid
when the cyclic input signal within the range specified by the frequency window is detected (or not detected)
in continuation.
Amplifier input
/DOUT
~~
T (DET)
~~
T (DET)
~~
Note 1: You are free to use any kind of communication protocol you wish, however be sure to configure a time of
carrier wave × 15 waves or more for both when there are and aren’t signals.
5 2007-07-19

5 Page





T6B70BFG arduino
(7) Pull-up resistance 1
Pull-up resistance 2
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1 OSCIN
2 OSCOUT
IILRRST1 3 FOUT
IILRRST2 4 /SCTL
A 5 /RESET
6 AMPOUT
7 AMPIN
8 VSS
VDD 16
SW1OUT 15
SW1IN 14
SOUT+ 13
SOUT12
SW2IN 11
SW2OUT 10
/DOUT 9
5V
T6B70BFG
(8) Low to High input switching level
High to Low input switching level
4 MHz
PG
VIHSCTL
VILSCTL
1 OSCIN
2 OSCOUT
3 FOUT
4 /SCTL
5 /RESET
6 AMPOUT
7 AMPIN
8 VSS
VDD 16
SW1OUT 15
SW1IN 14
SOUT+ 13
SOUT12
SW2IN 11
SW2OUT 10
/DOUT 9
5V
Monitor
Monitor
(9) High-level input current
Low-level input current
1 OSCIN
VDD 16
IIHSCTL 2 OSCOUT
IILSCTL
3
FOUT
A 4 /SCTL
SW1OUT 15
SW1IN 14
SOUT+ 13
5 /RESET
SOUT12
VIN
6 AMPOUT
SW2IN 11
7 AMPIN
SW2OUT 10
8 VSS
/DOUT 9
5V
(10) High-level output voltage
VOHFOUT V
1 OSCIN
2 OSCOUT
3 FOUT
4 /SCTL
5 /RESET
6 AMPOUT
7 AMPIN
8 VSS
VDD 16
SW1OUT 15
SW1IN 14
SOUT+ 13
SOUT12
SW2IN 11
SW2OUT 10
/DOUT 9
5V
(11) Low-level output voltage
VOLFOUT V
1 OSCIN
2 OSCOUT
3 FOUT
4 /SCTL
5 /RESET
6 AMPOUT
7 AMPIN
8 VSS
VDD 16
SW1OUT 15
SW1IN 14
SOUT+ 13
SOUT12
SW2IN 11
SW2OUT 10
/DOUT 9
5V
(12) High-level output voltage
4 MHz
PG
1 OSCIN
2 OSCOUT
3 FOUT
4 /SCTL
5 /RESET
6 AMPOUT
7 AMPIN
8 VSS
5V
VDD 16
SW1OUT 15
SW1IN 14
SOUT+ 13
SOUT12
SW2IN 11
SW2OUT 10
/DOUT 9
VOHDOUT V
11 2007-07-19

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