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PDF IR2214SSPbF Data sheet ( Hoja de datos )

Número de pieza IR2214SSPbF
Descripción HALF-BRIDGE GATE DRIVER IC
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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No Preview Available ! IR2214SSPbF Hoja de datos, Descripción, Manual

Data Sheet No. PD60213 revG
IR2114SSPbF/IR21141SSPbF
IR2214SSPbF/IR22141SSPbF
HALF-BRIDGE GATE DRIVER IC
Features
Floating channel up to +600 V or +1200 V
Soft over-current shutdown
Synchronization signal to synchronize shutdown with the other phases
Integrated desaturation detection circuit
Two stage turn on output for di/dt control
www.DataSheet4U.com Separate pull-up/pull-down output drive pins
Matched delay outputs
Undervoltage lockout with hysteresis band
LEAD-FREE
Description
The IR211(4,41)/IR221(4,41) gate driver family is suited to drive a single half
bridge in power switching applications. These drivers provide high gate driving
capability (2 A source, 3 A sink) and require low quiescent current, which allows
the use of bootstrap power supply techniques in medium power systems. These
drivers feature full short circuit protection by means of power transistor
desaturation detection and manage all half-bridge faults by smoothly turning off
the desaturated transistor through the dedicated soft shutdown pin, therefore
preventing over-voltages and reducing EM emissions. In multi-phase systems,
the IR211(4,41)/ IR221(4,41) drivers communicate using a dedicated local
network (SY_FLT and FAULT/SD signals) to properly manage phase-to-phase
short circuits. The system controller may force shutdown or read device fault
state through the 3.3 V compatible CMOS I/O pin (FAULT/SD). To improve the
signal immunity from DC-bus noise, the control and power ground use dedicated
pins enabling low-side emitter current sensing as well. Undervoltage conditions
in floating and low voltage circuits are managed independently.
Product Summary
VOFFSET
IO+/- (min)
VOUT
Deadtime matching (max)
Deadtime (typ)
Desat blanking time (typ)
DSH, DSL input voltage
threshold (typ)
Soft shutdown time (typ)
600 V or
1200 V max.
1.0 A / 1.5 A
10.4 V – 20 V
75 ns
330 ns
3 µs
8.0 V
9.25 µs
Package
24-Lead SSOP
Typical connection
DC+
15 V
DC BUS
uP,
(Up to 1200 V) Control
VCC
LIN
HIN
FAULT/SD
FLT_CLR
SY_ F LT
VSS
VB
HOP
HON
SSDH
DSH
VS
LOP
LON
SSDL
DSL
COM
Motor
DC-
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IR2214SSPbF pdf
IR211(4,41)/IR221(4,41)SSPbF
AC Electrical Characteristics
VCC = VBS = 15 V, VS = VSS and TA = 25 °C unless otherwise specified.
Symbol
Definition
Min. Typ. Max. Units
Test Conditions
ton
toff
tr
tf
ton1
tDESAT1
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tDESAT2
Turn on propagation delay
220 440 660
Turn off propagation delay
Turn on rise time (CLOAD=1 nF)
Turn off fall time (CLOAD=1 nF)
Turn on first stage duration time
220 440 660
— 24 —
—7—
120 200 280
DSH to HO soft shutdown propagation delay at HO
turn on
2000
3300
4600
DSH to HO soft shutdown propagation delay after
blanking
1050
VIN = 0 & 1, VS = 0 V to 600 V
or 1200 V,
HOP shorted to HON, LOP
shorted to LON, Fig. 7
Fig. 8
VHIN= 1 V
VDESAT = 15 V, Fig. 10
tDESAT3
DSL to LO soft shutdown propagation delay at LO
turn on
2000
3300
4600
VLIN = 1 V
tDESAT4
tDS
tSS
tSY_FLT,
DESAT1
tSY_FLT,
DESAT2
tSY_FLT,
DESAT3
tSY_FLT,
DESAT4
tBL
DSL to LO soft shutdown propagation delay after
blanking
Soft shutdown minimum pulse width of desat
Soft shutdown duration period
DSH to SY_FLT propagation delay at HO turn on
1050 — —
1000 — —
5700 9250 13500
— 3600 —
ns
VDESAT = 15 V, Fig. 10
Fig. 9
VDS=15 V, Fig. 9
VHIN = 1 V
DSH to SY_FLT propagation delay after blanking 1300 — —
VDS = 15 V, Fig. 10
DSL to SY_FLT propagation delay at LO turn on
— 3050 —
VLIN = 1 V
DSL to SY_FLT propagation delay after blanking 1050 — —
DS blanking time at turn on
— 3000 —
VDESAT=15 V, Fig. 10
VHIN = VLIN = 1 V, VDESAT=15 V,
Fig. 10
Deadtime/Delay Matching Characteristics
DT Deadtime
— 330 —
Fig. 11
MDT
Deadtime matching, MDT=DTH-DTL
— — 75
External DT = 0 s, Fig. 11
PDM
Propagation delay matching,
Max (ton, toff) – Min (ton, toff)
— — 75
External DT > 500 ns, Fig. 7
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IR2214SSPbF arduino
IR211(4,41)/IR221(4,41)SSPbF
HO/LO Status
0
1
SSD
LO/HO
LOn-1/HOn-1
HOP/LOP HON/LON
SSDH/SSDL
HiZ 0
HiZ
1 HiZ
HiZ
HiZ HiZ
0
Output follows inputs (in=1->out=1, in=0->out=0)
Output keeps previous status
IR2214 Logic Table: Output Drivers Status Description
Undervoltage
Yes: V< UV
w w w . D a t a S h e e t 4 U . c o m threshold
INPUTS
INPUT/OUTPUT
No : V> UV
threshold
X: don’t care
______
_________
SY_FLT
FAULT/SD
Operation
Hin
Lin
FLT_CLR
SSD: desat (out)
HOLD: freezing
SD: shutdown (in)
FAULT: diagnostic
VCC
VBS
(in) (out)
Shutdown
XX
X
X
0 (SD)
XX
Fault Clear HIN LIN
NOTE1
(FAULT)
No No
OUTPUTS
HO LO
00
HO LO
Normal
Operation
10
01
00
Anti Shoot
Through
1
1
Soft 1 0
Shutdown
(entering)
01
Soft
Shutdown
(finishing)
XX
XX
0
0
0
0
0
0
0
0
1
1
1
1
(SSD)
(SSD)
(SSD)
(SSD)
1
1
1
1
1
1
(FAULT)
(FAULT)
No No
No No
No No
1
0
0
0
1
0
No No
0
0
No No SSD 0
No No
0 SSD
No No
0
0
No No
0
0
Freeze
XX
X
0 (HOLD)
1 No No HOn-1 LOn-1
Undervoltage
X
X
LIN
X
X
X
1
1
No Yes
0
LO
1
0 (FAULT)
Yes X 0 0
NOTE 1: SY_FLT automatically resets after the SSD event is over and FLT_CLR is not required. In order to avoid the
FLT_CLR conflicting with the SSD procedure, FLT_CLR should not be operated while SY_FLT is active.
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