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PDF S1M8821 Data sheet ( Hoja de datos )
| Número de pieza | S1M8821 | |
| Descripción | (S1M8821 - S1M8823) INTERGER RF/IF DUAL PLL | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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INTERGER RF/IF DUAL PLL
INTRODUCTION
The S1M8821/22/23 is a high performance dual frequency
synthesizer with integrated prescalers designed for RF operation up
to 1.2GHz/2.0GHz/2.5GHz and IF operation up to 520MHz.
The S1M8821/22/23 contains dual-modulus prescalers. The RF
synthesizer adopts a 64/65 or a 128/129 prescaler(32/33 or 64/65 for
the S1M8823) and the IF synthesizer adopts an 8/9 or a 16/17
prescaler.
Using a proprietary digital phase-locked-loop technique, the
www.DataShSee1tM4U8.c8o2m1/22/23 has linear phase detector characteristic and can be
used for very stable, low noise local oscillator signal. Supply voltage
can range from 2.7V to 4.0V. The S1M8821/22/23 is now available in
a 20-TSSOP/24-QFN package.
20-TSSOP-BD44
24-QFN-3.5×4.5
FEATURES
• High operating frequency dual synthesizer
— S1M8821 : 0.1 to 1.2GHz (RF)/ 45 to 520MHz (IF)
— S1M8822 : 0.2 to 2.0GHz (RF)/ 45 to 520MHz (IF)
— S1M8823 : 0.5 to 2.5GHz (RF)/ 45 to 520MHz (IF)
• Very low current consumption(8821:3.5mA, 22:4.5mA, 23:5.5mA)
• Operating voltage range : 2.7 to 4.0V
• Selectable power saving mode(Icc=1uA typical @3V)
• Dual modulus prescaler :
S1M8821/22
(RF) 64/65 or 128/129
S1M8823
(RF) 32/33 or 64/65
S1M8821/22/23
(IF) 8/9 or 16/17
• Programmability via serial bus interface
• No dead-zone PFD
• Variable charge pump output current
• High speed lock mode
APPLICATIONS
• Cellular telephone systems : S1M8821
• Portable wireless communications : S1M8822 (PCS/PCN, cordless)
• Wireless Local Area Networks (W-LANs) : S1M8823
• Other wireless communication systems
S1M8821/22/23
1
1 page  
INTERGER RF/IF DUAL PLL
PIN CONFIGURATION(24-QFN, NOT TO SCALE)
S1M8821/22/23
www.DataSheet4U.com
N/C 1
Vp1 2
CPoRF 3
GND 4
(Digital)
finRF 5
finRF 6
GND 7
(Analog)
OSCin 8
N/C 9
VDD1 VDD2 Vp2
24 23 22
21 N/C
20 CPoIF
S1M8821
S1M8822
S1M8823
19 GND
(Digital)
18 finIF
17 finIF
16 GND
(Analog)
15 LE
14 DATA
10 11 12
GND foLD CLOCK
(Digital)
24-QFN
13 N/C
24 PIN Quad Flat Non-leaded
(24-QFN) Package
* N/C pins must be connected
to GND(to Analog GND if
possible).
NOTES:
1 pin #10 = pin #19(internally connected).
2. Do not tie up Vp and VDD
: Vp is the source of digital noises. The power for analog part is supplied by VDD. If Vp and VDD are tied together,
noisy Vp corrupts the power source for the analog part.
5
5 Page 
INTERGER RF/IF DUAL PLL
S1M8821/22/23
ELECTRICAL CHARACTERISTICS (Continued)
(VDD=3.0V, VP=3.0V, Ta = 25°C, Unless otherwise specified)
Characteristic
Symbol
Test Conditions
Charge Pump Outputs : CPoRF, CPoIF
www.DataSheCeht4aUr.gcoemPump Output
Current
Charge Pump Leakage
Current
ICP-SRC
ICP-SINK
ICP-SRC
ICP-SINK
ICPL
VCP=VP/2, ICPo=Low
VCP=VP/2, ICPo=Low
VCP=VP/2, ICPo=High
VCP=VP/2, ICPo=High
0.5V ≤ VCP ≤ VP-0.5V
Output Current Sink vs.
Source Mismatch*
Output Current Magnitude
Variation vs. Temperature**
ICP-SINK
vs ICP-SRC
VCP=VP/2
ICP vs T VCP=VP/2
Output Current Magnitude
Variation vs. Voltage***
ICP vs VCP 0.5V ≤ VCP ≤ VP-0.5V
Programmable Divider
Operating
Frequency
S1M8823
S1M8822
S1M8821
finRF
VDD=2.7V to 4.0V
Operating Frequency
RF Input Sensitivity
IF Input Sensitivity
Phase Detector Frequency
Reference Divider
finIF
PfinRF
PfinIF
fPD
VDD=3.0V
VDD=3.0V
VDD=4.0V
VDD=2.7V to 4.0V
Operating Frequency
OSCin
Input Sensitivity
VOSCin
Min.
Typ.
Max. Unit
-1.0
+1.0
-4.0
+4.0
mA
-2.5 +2.5 nA
3 10 %
10 %
10 15 %
0.5 2.5
0.2 2.0 GHz
0.1 1.2
45 520 MHz
-15 0
dBm
-10 0
-10 0 dBm
10 MHz
5 40 MHz
0.5 VPP
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet S1M8821.PDF ] | |
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