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PDF DS1854 Data sheet ( Hoja de datos )
| Número de pieza | DS1854 | |
| Descripción | Dual Temperature-Controlled Resistors | |
| Fabricantes | Maxim Integrated Products | |
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Rev 0; 1/03
Dual Temperature-Controlled Resistors with
Two Monitors
General Description
The DS1854 dual temperature-controlled nonvolatile
(NV) variable resistors with two monitors consists of two
50kΩ 256-position linear variable resistors, two analog
monitor inputs (MON1, MON2), and a direct-to-digital
temperature sensor. The device provides an ideal
method for setting and temperature-compensating bias
voltages and currents in control applications using min-
www.DataSheeiEmtE4aUPl.RccoOimrcMuimtrye.mTohrey
variable resistor settings are stored in
and can be accessed over the 2-wire
serial bus.
Applications
Optical Transceivers
Optical Transponders
Instrumentation and Industrial Controls
RF Power Amps
Diagnostic Monitoring
Features
♦ Four Total Monitored Channels (Temperature,
VCC, MON1, MON2)
♦ Two External Analog Inputs (MON1, MON2)
♦ Internal Direct-to-Digital Temperature Sensor
♦ Two 50kΩ, Linear, 256-Position, Nonvolatile
Temperature-Controlled Variable Resistors
♦ Resistor Settings Changeable Every 2°C
♦ Access to Monitoring and ID Information
Configurable with Separate Device Addresses
♦ Resistor Disable (Open-Circuit) Function
♦ 2-Wire Serial Interface
♦ Two Buffers with TTL/CMOS-Compatible Inputs
and Open-Drain Outputs
♦ Operates from a 3.3V or 5V Supply
♦ SFF-8472 Compatible
Ordering Information
PART
DS1854E-050
TEMP RANGE PIN-PACKAGE
-40°C to +95°C 16 TSSOP
DS1854E-050/T&R
-40°C to +95°C
16 TSSOP
(Tape-and-Reel)
DS1854B-050
-40°C to +95°C 16-Ball CSBGA
Typical Operating Circuit
VCC
4.7kΩ
2-WIRE
INTERFACE
TX-FAULT
LOS
GROUND TO
DISABLE WRITE
PROTECT
VCC = 3.3V
4.7kΩ
1
SDA
2
SCL
3
OUT1
4
IN1
5
OUT2
6
IN2
7
WPEN
8
GND
DS1854
16
VCC
H1 15
14
L1
13
H0
12
L0
0.1µF
DECOUPLING
CAP
TO LASER BIAS
CONTROL
TO LASER
MODULATION
CONTROL
11 Rx POWER*
MON2
10 Tx BIAS*
MON1
RHIZ 9 Tx DISABLE
DIAGNOSTIC
INPUTS
0 TO 2.5V FS
*Rx POWER AND Tx BIAS CAN BE ARBITRARILY
ASSIGNED TO THE MON INPUTS
Pin Configurations
TOP VIEW
A
IN1
SCL VCC
1 SDA
H1
2 SCL
VCC 16
H1 15
B OUT2 SDA
H0
3 OUT1
L1
4 IN1
L1 14
H0 13
5 OUT2 DS1854
C WPEN IN2 OUT1 MON2
L0 12
6 IN2
MON2 11
7 WPEN
D GND L0 RHIZ MON1
8 GND
MON1 10
RHIZ 9
1234
16-BALL CSBGA (4mm x 4mm)
1.0mm PITCH
16 TSSOP
______________________________________________ Maxim Integrated Products 1
For pricing delivery, and ordering information please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Dual Temperature-Controlled Resistors with
Two Monitors
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.0V to 5.5V, TA = -40°C to +95°C, unless otherwise noted.)
Note 10: After this period, the first clock pulse is generated.
Note 11: The maximum tHD:DAT only has to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (see the VIH MIN of the SCL signal) in
order to bridge the undefined region of the falling edge of SCL.
Note 13: CB—total capacitance of one bus line, timing referenced to 0.9 x VCC and 0.1 x VCC.
www.DataSheeNt4oUte.c1o4m: EEPROM write begins after a STOP condition occurs.
(VCC = 5.0V, TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
700
660
620
580
540
500
-40 -20
0 20 40 60
TEMPERATURE (°C)
80 100
Typical Operating Characteristics
SUPPLY CURRENT vs. VOLTAGE
700
650
600
550
500
450
400
3.0 3.5 4.0 4.5 5.0 5.5
VOLTAGE (V)
RESISTANCE vs. SETTING
60
50
40
30
20
10
0
0 50 100 150 200 250 300
SETTING
ACTIVE SUPPLY CURRENT
vs. SCL FREQUENCY
700
SDA = 5V
660
620
580
540
500
0
100 200 300
SCL FREQUENCY (kHz)
400
_____________________________________________________________________ 5
5 Page 
Dual Temperature-Controlled Resistors with
Two Monitors
Variable Resistors
The value of each variable resistor is determined by a
temperature-addressed look-up table, which can
assign a unique value (00h to FFh) to each resistor for
every 2°C increment over the -40°C to +102°C range
(see Table 3). See the Temperature Conversion section
for more information.
A resistor disable feature places both outputs in a high-
impedance mode. This occurs when the RHIZ input is
www.DataSheehti4gUh.c. oAmn internal pullup of RRHIZ is provided, readying
this pin for input from the Tx Disable signal as specified
in the SFF and SFP MSA.
The variable resistors can also be used in manual
mode. If the TEN bit equals 0, then the resistors are in
manual mode and the temperature indexing is dis-
abled. The user sets the resistors in manual mode by
writing to addresses 82h and 83h in Table 01 to control
resistors 0 and 1, respectively.
Memory Description
Main and auxiliary memories can be accessed by two
separate device addresses. The Main Device address
is A2h (or value in Table 01, byte 8Ch when ADFIX = 1)
and the Auxiliary Device address is A0h. A user option
is provided to respond to one or two device addresses.
This feature can be used to save component count in
SFF applications (Main Device address can be used)
or other applications where both GBIC (Auxiliary
Device address can be used) and monitoring functions
are implemented and two device addresses are need-
ed. The memory blocks are enabled with the corre-
sponding device address. Memory space from 80h and
up is accessible only through the Main Device address.
This memory is organized as three tables; the desired
table can be selected by the contents of memory loca-
tion 7Fh, Main Device. The Auxiliary Device address
has no access to the tables, but the Auxiliary Device
address can be mapped into the Main Device’s memo-
ry space as a fourth table. Device addresses are pro-
grammable with two control bits in EEPROM.
ADEN configures memory access to respond to differ-
ent device addresses (see Tables 4 and 5).
The default device address for EEPROM-generated
addresses is A2h.
If the ADEN bit is 1, additional 128 bytes of EEPROM
are accessible through the Main Device, selected as
Table 00 (see Figure 3). In this configuration, the
Auxiliary Device address is not accessible. APEN con-
trols the protection of Table 00 regardless of the setting
of ADEN.
ADFIX (address fixed) determines whether the Main
Device address is determined by an EEPROM byte
(Table 01, byte 8Ch, when ADFIX =1). There can be up
to 128 devices sharing a common 2-wire bus, with
each device having its own unique device address.
Memory Protection
Memory access from either device address can be
either read/write or read only. Write protection is accom-
plished by a combination of control bits in EEPROM
(APEN and MPEN in configuration register 89h) and a
write-protect enable (WPEN) pin. Since the WPEN pin is
often not accessible from outside the module, this
scheme effectively allows the module to be locked by
the manufacturer to prevent accidental writes by the
end user.
Separate write protection is provided for the Auxiliary
and Main Device address through distinct bits APEN
and MPEN. APEN and MPEN are bits from configura-
tion register 89h, Table 01. Due to the location, the
APEN and MPEN bits can only be written through the
Main Device address. The control of write privileges
through the Auxiliary Device address is dependent on
the value of APEN. Care should be taken with the set-
ting of MPEN, once set to a 1, assuming WPEN is high,
access through the Main Device is thereafter denied
unless WPEN is taken to a low level. By this means
inadvertent end-user write access can be denied.
Main Device address space 60h to 7Fh is SRAM and is
not write protected by APEN, MPEN, or WPEN. For
example, the user may reset flags set by the device.
Bytes designated as “Reserved” may be used as
scratchpad, but they will not be stored in a power cycle
because of their volatility. These bytes are reserved for
added functionality in future versions of this device. Note
that in single device mode (ADEN bit = 1), APEN deter-
mines the protection level of Table 00, independent of
WPEN.
The write-protect operation, for both Main and Auxiliary
Devices, is summarized in the Tables 6 and 7.
Table 6. Main Device
WPEN
0
X
1
MPEN
X
0
1
PROTECT MAIN
No
No
Yes
Table 7. Auxiliary Device
APEN
0
1
WPEN
X
X
PROTECT AUXILIARY
No
Yes
____________________________________________________________________ 11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet DS1854.PDF ] | |
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