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PDF PD27025F Data sheet ( Hoja de datos )

Número de pieza PD27025F
Descripción Lateral MOSFET
Fabricantes PEAK electronics GmbH 
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PD27025F
25 W, 2.5GHz - 2.7GHz , N-Channel E-Mode, Lateral MOSFET
Introduction
The PD27025F is a high-voltage, gold-metalized,
laterally diffused metal oxide semiconductor
www.DataSheet4U.com
(LDMOS) RF power transistor suitable for
2.5GHz - 2.7GHz Class AB wireless base
station
amplifier applications.
This device is manufactured on an advanced LDMOS
technology, offering state-of-the-art performance,
reliability, and thermal resistance. Packaged in an
industry-standard CuW package capable of deliver
ing a minimum output power of 25 W, it is ideally
suited for today's RF power amplifier applications.-
Table 1. Thermal Characteristics
Parameter
Thermal Resistance,
Junction to Case:
Sym
R JC
Value
2.1
Unit
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Drain Current—Continuous
Sym Value Unit
VDSS 65 Vdc
VGS –0.5, +15 Vdc
ID 4.25 Adc
Total Dissipation at TC = 70 °C: PD 83.5 W
Derate Above 70 °C:
— 0.48 W/°C
Operating Junction Tempera-
ture
TJ
200 °C
Storage Temperature Range TSTG –65, +150 °C
PD27025F (flanged)
Figure 1. Available Packages
Features
Application Specific Performance, 2.7 GHz
Typical 2-Tone Performance
Average Load Power – 12.5 W
ηD – 30%
Power Gain – 11.5 dB
IMD3: -30dBc @ -100kHz/ +100KHz
Typical CW Performance
Average Load Power – 25 W
ηD – 38%
Power Gain – 11.0 dB
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating*
HBM
MM
CDM
Minimum (V)
500
50
1500
Class
1B
A
4
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations. Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.

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