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PDF K4T1G164QQ Data sheet ( Hoja de datos )

Número de pieza K4T1G164QQ
Descripción (K4T1G044QQ - K4T1G164QQ) 1Gb A-die DDR2 SDRAM Specification
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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K4T1G044QQ
K4T1G084QQ
K4T1G164QQ
DDR2 SDRAM
1Gb Q-die DDR2 SDRAM Specification
www.DataSheet4U.com
60FBGA & 84FBGA with Pb-Free & Halogen-Free
(RoHS compliant)
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure couldresult in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice.
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Rev. 1.01 November 2007

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K4T1G164QQ pdf
K4T1G044QQ
K4T1G084QQ
K4T1G164QQ
3.0 Package Pinout/Mechanical Dimension & Addressing
DDR2 SDRAM
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3.1 x4/x8 package pinout (Top View) : 60ball FBGA Package
1 23
7 89
VDD
DQ6
NU/
RDQS
VSSQ
VSS
DM/
RDQS
VDDQ DQ1 VDDQ
A
B
C
VSSQ DQS VDDQ
DQS VSSQ DQ7
VDDQ DQ0 VDDQ
DQ4 VSSQ DQ3 D DQ2 VSSQ DQ5
VDDL VREF VSS
E VSSDL CK
VDD
CKE WE F RAS CK ODT
BA2 BA0 BA1 G CAS CS
A10/AP A1 H A2 A0 VDD
VSS
A3
A5 J
A6
A4
A7 A9 K A11 A8 VSS
VDD A12 NC L NC A13
Note:
1. Pins B3 and A2 have identical capacitance as pins B7 and A8.
2. For a read, when enabled, strobe pair RDQS & RDQS are identical in
function and timing to strobe pair DQS & DQS and input masking function
is disabled.
3. The function of DM or RDQS/RDQS are enabled by EMRS command.
4. VDDL and VSSDL are power and ground for the DLL.
Ball Locations (x4/x8) : Populated Ball
+ : Depopulated Ball
Top View (See the balls through the Package)
123456789
A
B
C
D
E
F+
G
H+
J
K+
L
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+
+
+
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Rev. 1.01 November 2007

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K4T1G164QQ arduino
K4T1G044QQ
K4T1G084QQ
K4T1G164QQ
DDR2 SDRAM
6.0 Absolute Maximum DC Ratings
Symbol
Parameter
Rating
Units
Notes
VDD
VDDQ
VDDL
VIN, VOUT
TSTG
Voltage on VDD pin relative to VSS
Voltage on VDDQ pin relative to VSS
Voltage on VDDL pin relative to VSS
Voltage on any pin relative to VSS
Storage Temperature
- 1.0 V ~ 2.3 V
- 0.5 V ~ 2.3 V
- 0.5 V ~ 2.3 V
- 0.5 V ~ 2.3 V
-55 to +100
V1
V1
V1
V1
°C 1, 2
Note :
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. Storage Temperature is the case surface temperature on the center/top side of the DRAM.
www.DataSheet4U.com
7.0 AC & DC Operating Conditions
7.1 Recommended DC Operating Conditions (SSTL - 1.8)
Symbol
Parameter
Min.
Rating
Typ.
Max.
Units
Notes
VDD Supply Voltage
1.7 1.8 1.9
V
VDDL
Supply Voltage for DLL
1.7 1.8 1.9
V
4
VDDQ
Supply Voltage for Output
1.7 1.8 1.9
V
4
VREF
Input Reference Voltage
0.49*VDDQ
0.50*VDDQ
0.51*VDDQ
mV
1,2
VTT Termination Voltage
VREF-0.04
VREF
VREF+0.04
V
3
Note : There is no specific device VDD supply voltage requirement for SSTL-1.8 compliance. However under all conditions VDDQ must be less than or equal
to VDD.
1. The value of VREF may be selected by the user to provide optimum noise margin in the system. Typically the value of VREF is expected to be about 0.5
x VDDQ of the transmitting device and VREF is expected to track variations in VDDQ.
2. Peak to peak AC noise on VREF may not exceed +/-2% VREF(DC).
3. VTT of transmitting device must track VREF of receiving device.
4. AC parameters are measured with VDD, VDDQ and VDDL tied together.
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Rev. 1.01 November 2007

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