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PDF ICS840002I-01 Data sheet ( Hoja de datos )

Número de pieza ICS840002I-01
Descripción CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
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Integrated
Circuit
Systems, Inc.
ICS840002I-01
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS840002I-01 is a 2 output LVCMOS/LVTTL
ICS Synthesizer optimized to generate Ethernet
HiPerClockS™ reference clock frequencies and is a member of
the HiPerClocksTM family of high performance
clock solutions from ICS. Using a 25MHz 18pF
parallel resonant crystal, the following frequencies can be
generated based on the 2 frequency select pins (F_SEL1:0):
156.25MHz, 125MHz, and 62.5MHz. The ICS840002I-01 uses
www.DataSheeItC4US.c3ormd generation low phase noise VCO technology and can
achieve 1ps or lower typical random rms phase jitter, easily
meeting Ethernet jitter requirements. The ICS840002I-01 is
packaged in a small 16-pin TSSOP package.
FREQUENCY SELECT FUNCTION TABLE
FEATURES
• Two LVCMOS/LVTTL outputs @ 3.3V,
17Ω typical output impedance
• Selectable crystal oscillator interface
or LVCMOS single-ended input
• Supports the following output frequencies:
156.25MHz, 125MHz and 62.5MHz
• Output frequency range: 56MHz - 175MHz
• VCO range: 560MHz - 700MHz
• Output skew: 12ps (maximum)
• RMS phase jitter at 156.25MHz (1.875MHz - 20MHz):
0.47ps (typical)
Phase noise:
Offset
Noise Power
100Hz ............... -97.4 dBc/Hz
1KHz .............. -120.2 dBc/Hz
10KHz .............. -127.6 dBc/Hz
100KHz .............. -126.1 dBc/Hz
• Power supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
• -40°C to 85°C ambient operating temperature
• Lead-Free package RoHS compliant
F_SEL1
0
F_SEL0
0
Inputs
M Divider Value
25
N Divider Value
4
Output Frequency
(25MHz Ref.)
156.25
01
25
5
125
10
25
10
62.5
11
25
5
125
BLOCK DIAGRAM
OE Pullup
F_SEL1:0 Pullup:Pullup
nPLL_SEL Pulldown
nXTAL_SEL Pulldown
XTAL_IN 25MHz
OSC 0
XTAL_OUT
TEST_CLK Pulldown
1
2
Phase
Detector
VCO
F_SEL1:0
1N
0 0 ÷4
0 1 ÷5
0 1 0 ÷10
1 1 ÷5
M = ÷25 (fixed)
PIN ASSIGNMENT
F_SEL0 1 16 F_SEL1
nXTAL_SEL 2 15 GND
TEST_CLK 3 14 GND
OE 4 13 Q0
MR 5 12 Q1
nPLL_SEL 6
1 1 VDDO
VDDA 7
10 XTAL_IN
VDD 8
9 XTAL_OUT
Q0 ICS840002I-01
16-Lead TSSOP
Q1 4.4mm x 5.0mm x 0.92mm
package body
G Package
Top View
MR Pulldown
840002AGI-01
www.icst.com/products/hiperclocks.html
1
REV. A MARCH 3, 2005

1 page




ICS840002I-01 pdf
Integrated
Circuit
Systems, Inc.
ICS840002I-01
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 5B. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
fOUT Output Frequency
tsk(o) Output Skew; NOTE 1, 3
www.DataSheet4tjUit(.cØo)m
RMS Phase Jitter (Random);
NOTE 2
Test Conditions
F_SEL[1:0] = 00
F_SEL[1:0] = 01
F_SEL[1:0] = 10 or 11
156.25MHz (1.875MHz - 20MHz)
125MHz (1.875MHz - 20MHz)
62.5MHz (1.875MHz - 20MHz)
Minimum
140
112
56
Typical
0.47
0.55
0.49
Maximum
175
140
68
12
Units
MHz
MHz
MHz
ps
ps
ps
ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
200
46
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: Please refer to the Phase Noise Plot.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
700
54
ps
%
TABLE
5C.
AC
CHARACTERISTICS,
V
DD
=
V
DDA
=
V
DDO
=
2.5V±5%,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
F_SEL[1:0] = 00
140
175
fOUT Output Frequency
F_SEL[1:0] = 01
F_SEL[1:0] = 10 or 11
112
56
140
68
tsk(o) Output Skew; NOTE 1, 3
12
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 2
156.25MHz (1.875MHz - 20MHz)
125MHz (1.875MHz - 20MHz)
62.5MHz (1.875MHz - 20MHz)
0.49
0.56
0.52
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
200
46
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: Please refer to the Phase Noise Plot.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
700
54
Units
MHz
MHz
MHz
ps
ps
ps
ps
ps
%
840002AGI-01
www.icst.com/products/hiperclocks.html
5
REV. A MARCH 3, 2005

5 Page





ICS840002I-01 arduino
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - G SUFFIX FOR 16 LEAD TSSOP
ICS840002I-01
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
www.DataSheet4U.com
840002AGI-01
TABLE 7. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
Maximum
N 16
A -- 1.20
A1 0.05 0.15
A2 0.80 1.05
b 0.19 0.30
c 0.09 0.20
D 4.90 5.10
E 6.40 BASIC
E1 4.30 4.50
e 0.65 BASIC
L 0.45 0.75
α 0° 8°
aaa -- 0.10
Reference Document: JEDEC Publication 95, MO-153
www.icst.com/products/hiperclocks.html
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