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PDF ICS840011 Data sheet ( Hoja de datos )

Número de pieza ICS840011
Descripción CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
Fabricantes Integrated Circuit Systems 
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No Preview Available ! ICS840011 Hoja de datos, Descripción, Manual

Integrated
Circuit
Systems, Inc.
ICS840011
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
GENERAL DESCRIPTION
ICS
The ICS840011 is a Fibre Channel Clock
Generator and a member of the HiPerClocksTM
HiPerClockS™ family of high performance devices from ICS.
The ICS840011 uses a 26.5625MHz or 25MHz
crystal to synthesize 106.25MHz or 100MHz
respectively. The ICS840011 has excellent phase jitter
performance, from 637KHz – 10MHz integration range. The
ICS840011 is packaged in a small 8-pin TSSOP, making it
www.DataSheeitd4eUa.clofmor use in systems with limited board space.
FEATURES
1 LVCMOS/LVTTL output, 7output impedence
Crystal oscillator interface designed for a 26.5625MHz or
25MHz, 18pF parallel resonant crystal
Output frequency: 106.25MHz (typical)
VCO range: 560MHz to 680MHz
RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal
(637KHz - 10MHz): 0.780ps (typical)
RMS phase noise at 106.25MHz (typical)
Phase noise:
Offset
Noise Power
100Hz ............... -95.7 dBc/Hz
1KHz ................ -121 dBc/Hz
10KHz ................ -129 dBc/Hz
100KHz .............. -129.6 dBc/Hz
3.3V operating supply
-30°C to 85°C ambient operating temperature
FREQUENCY TABLE
Inputs
Crystal Frequency (MHz)
26.5625
25
Output Frequency
(MHz)
106.25
100
BLOCK DIAGRAM
OE (Pullup)
XTAL_IN
XTAL_OUT
OSC
Phase
Detector
VCO
637.5MHz w/
26.5625MHz Ref.
M = ÷24 (fixed)
÷6
PIN ASSIGNMENT
VDDA 1
8 VDD
OE 2
7 Q0
XTAL_OUT 3
6 GND
Q0
XTAL_IN 4
5 nc
ICS840011
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
840011AG
www.icst.com/products/hiperclocks.html
1
REV. A OCTOBER 15, 2004

1 page




ICS840011 pdf
Integrated
Circuit
Systems, Inc.
ICS840011
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
1.65V ± 5%
VDD
www.DataSheet4U.com
LVCMOS
GND
-1.65V ± 5%
SCOPE
Qx
Phase Noise Plot
Phase Noise Mask
f1 Offset Frequency f2
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
RMS PHASE JITTER
V
DD
Q0 2
Pulse Width
t
PERIOD
odc = t PW
t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
20%
Clock
Outputs
80%
tR
80%
tF
20%
OUTPUT RISE/FALL TIME
840011AG
www.icst.com/products/hiperclocks.html
5
REV. A OCTOBER 15, 2004

5 Page





ICS840011 arduino
Integrated
Circuit
Systems, Inc.
ICS840011
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
Rev Table
A T9
Page
10
REVISION HISTORY SHEET
Description of Change
Ordering Information Table - corrected count from 154 per tube to 100.
Date
10/15/04
www.DataSheet4U.com
840011AG
www.icst.com/products/hiperclocks.html
11
REV. A OCTOBER 15, 2004

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