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PDF EE80C188EA Data sheet ( Hoja de datos )
| Número de pieza | EE80C188EA | |
| Descripción | (EE80C186EA / EE80C188EA) 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS | |
| Fabricantes | Intel Corporation | |
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80C186EA/80C188EA
Microprocessor
User’s Manual
www.DataSheet4U.com
1 page  
CONTENTS
2.3 INTERRUPTS AND EXCEPTION HANDLING ............................................................ 2-39
2.3.1 Interrupt/Exception Processing ...............................................................................2-39
2.3.1.1
Non-Maskable Interrupts ...............................................................................2-42
2.3.1.2
Maskable Interrupts .......................................................................................2-43
2.3.1.3
Exceptions .....................................................................................................2-43
2.3.2 Software Interrupts ..................................................................................................2-45
2.3.3 Interrupt Latency .....................................................................................................2-45
2.3.4 Interrupt Response Time ........................................................................................2-46
2.3.5 Interrupt and Exception Priority ...............................................................................2-46
CHAPTER 3
BUS INTERFACE UNIT
3.1 MULTIPLEXED ADDRESS AND DATA BUS ................................................................ 3-1
www.DataShe3e.2t4U.coAmDDRESS AND DATA BUS CONCEPTS ..................................................................... 3-1
3.2.1 16-Bit Data Bus .........................................................................................................3-1
3.2.2 8-Bit Data Bus ...........................................................................................................3-5
3.3 MEMORY AND I/O INTERFACES................................................................................. 3-6
3.3.1 16-Bit Bus Memory and I/O Requirements ...............................................................3-7
3.3.2 8-Bit Bus Memory and I/O Requirements .................................................................3-7
3.4 BUS CYCLE OPERATION ............................................................................................ 3-7
3.4.1 Address/Status Phase ............................................................................................3-10
3.4.2 Data Phase .............................................................................................................3-13
3.4.3 Wait States ..............................................................................................................3-13
3.4.4 Idle States ...............................................................................................................3-18
3.5 BUS CYCLES .............................................................................................................. 3-20
3.5.1 Read Bus Cycles ....................................................................................................3-20
3.5.1.1
Refresh Bus Cycles .......................................................................................3-22
3.5.2 Write Bus Cycles .....................................................................................................3-22
3.5.3 Interrupt Acknowledge Bus Cycle ...........................................................................3-25
3.5.3.1
System Design Considerations .....................................................................3-27
3.5.4 HALT Bus Cycle ......................................................................................................3-28
3.5.5 Temporarily Exiting the HALT Bus State .................................................................3-31
3.5.6 Exiting HALT ...........................................................................................................3-33
3.6 SYSTEM DESIGN ALTERNATIVES ........................................................................... 3-35
3.6.1 Buffering the Data Bus ............................................................................................3-36
3.6.2 Synchronizing Software and Hardware Events .......................................................3-38
3.6.3 Using a Locked Bus ................................................................................................3-39
3.6.4 Using the Queue Status Signals .............................................................................3-40
3.7 MULTI-MASTER BUS SYSTEM DESIGNS................................................................. 3-41
3.7.1 Entering Bus HOLD ................................................................................................3-41
3.7.1.1
HOLD Bus Latency ........................................................................................3-42
3.7.1.2
Refresh Operation During a Bus HOLD ........................................................3-43
3.7.2 Exiting HOLD ..........................................................................................................3-45
3.8 BUS CYCLE PRIORITIES ........................................................................................... 3-46
iv
5 Page 
CONTENTS
A.2.3 Bit Manipulation Instructions ................................................................................... A-9
A.2.3.1
Shift Instructions ............................................................................................. A-9
A.2.3.2
Rotate Instructions ....................................................................................... A-10
APPENDIX B
INPUT SYNCHRONIZATION
B.1 WHY SYNCHRONIZERS ARE REQUIRED ................................................................. B-1
B.2 ASYNCHRONOUS PINS.............................................................................................. B-2
APPENDIX C
INSTRUCTION SET DESCRIPTIONS
APPENDIX D
INSTRUCTION SET OPCODES AND CLOCK CYCLES
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INDEX
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EE80C188EA.PDF ] | |
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| Número de pieza | Descripción | Fabricantes |
| EE80C188EA | (EE80C186EA / EE80C188EA) 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS | Intel Corporation |
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