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PDF M37549 Data sheet ( Hoja de datos )

Número de pieza M37549
Descripción SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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No Preview Available ! M37549 Hoja de datos, Descripción, Manual

7549 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
REJ03B0202-0200
Rev.2.00
Mar 05, 2007
DESCRIPTION
The 7549 Group is the 8-bit microcomputer based on the 740
family core technology.
The 7549 Group has an 8-bit timer, 16-bit timer, serial interface,
A/D converter, power-on reset circuit and the low voltage
detection circuit. Also, the Function set ROM is equipped.
FEATURES
www.DataSheet4BUa.csiocmmachine-language instructions ..................................71
• The minimum instruction execution time ................... 0.25 µs
(at 8 MHz oscillation frequency, double-speed mode)
• Memory size
ROM ................................... 2 K, 4K, 6 K bytes
RAM ........................................... 192/256 bytes
• Programmable I/O ports
I/O port............................................................19
Output port........................................................1
• Key-on wakeup .......................................................................8
• LED direct drive port..............................................................8
• Interrupts ............................................. 13 sources, 13 vectors
• Timers ....................................................................... 8-bit × 2
..................................................................................16-bit × 1
• Output compare ........................................................ 3 channel
• Input capture ............................................................. 1 channel
• Serial interface............................................................ 8-bit × 1
(UART or clock synchronous)
• A/D converter ............................ 10-bit resolution × 8-channel
• Clock generating circuit ..................................... Built-in type
(connect to external ceramic resonator or quartz-crystal oscillator,
32 kHz quartz-crystal oscillation available)
• High-speed on-chip oscillator ............................ Typ. : 4 MHz
• Low-speed on-chip oscillator .......................... Typ. : 250 kHz
• Watchdog timer ...................................................... 16-bit × 1
• Power-on reset circuit.......................................... Built-in type
• Low voltage detection circuit .............................. Built-in type
• Power source voltage
XIN oscillation frequency
(at ceramic resonator, in double-speed mode)
At 8 MHz ........................................ 4.5 to 5.5 V
At 2 MHz ........................................ 2.4 to 5.5 V
At 1 MHz ........................................ 2.2 to 5.5 V
XIN oscillation frequency
(at ceramic resonator, in high-speed mode)
At 8 MHz ........................................ 4.0 to 5.5 V
At 4 MHz ........................................ 2.4 to 5.5 V
At 1 MHz ........................................ 1.8 to 5.5 V
High-speed on-chip oscillator oscillation frequency
At 4 MHz......................................... 4.0 to 5.5 V
Low-speed on-chip oscillator oscillation frequency
At 250 kHz (typ. value at VCC = 5V).... 1.8 to 5.5 V
• Power dissipation ........................................................ 30 mW
• Operating temperature range ............................... -20 to 85°C
APPLICATION
Office automation equipment, factory automation equipment,
home electric appliances, consumer electronics, etc.
Rev.2.00 Mar 05, 2007 Page 1 of 70
REJ03B0202-0200

1 page




M37549 pdf
7549 Group
www.DataSheet4U.com
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Fig 3. FUNCTIONAL BLOCK DIAGRAM
Rev.2.00 Mar 05, 2007 Page 5 of 70
REJ03B0202-0200

5 Page





M37549 arduino
7549 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Memory
• Special Function Register (SFR) Area
The SFR area in the zero page contains control registers such as
I/O ports and timers.
• RAM
RAM is used for data storage and for a stack area of subroutine
calls and interrupts.
• ROM
The first 128 bytes and the last 2 bytes of ROM are reserved for
device testing and the rest is a user area for storing programs.
The user area includes the function set ROM area.
www.DataSheet4U.com
• Interrupt Vector Area
The interrupt vector area contains reset and interrupt vectors.
• Zero Page
The 256 bytes from addresses 000016 to 00FF16 are called the
zero page area. The internal RAM and the special function
registers (SFR) are allocated to this area.
The zero page addressing mode can be used to specify memory
and register addresses in the zero page area. Access to this area
with only 2 bytes is possible in the zero page addressing mode.
• Special Page
The 256 bytes from addresses FF0016 to FFFF16 are called the
special page area. The special page addressing mode can be used
to specify memory addresses in the special page area. Access to
this area with only 2 bytes is possible in the special page
addressing mode.
[ROM code protect]
Address FFDB16 of QzROM version is ROM code protect
address and cannot be used for programming. “0016” is written
into this address when selecting the protect bit write by using a
serial programmer and selecting protect enabled for writing
shipment by Renesas Technology corp.. When “0016” is set to
the ROM code protect address, the protect func-tion is enabled,
so that reading or writing from/to the corresponding area is
disabled by a serial programmer.
As for the QzROM product in blank, the ROM code is protected by
selecting the protect bit write at ROM writing with a serial programmer.
As for the QzROM product shipped after writing, “0016” (protect
enabled) or “FF16” (protect disabled) is written into the ROM code
protect address when Renesas Technology corp. performs writing.
The writing of “0016” or “FF16” can be selected as ROM option setup
(“MASK option” written in the mask file converter) when ordering.
<Notes>
(1) Because the contents of RAM are indefinite at reset, set
initial values before using.
(2) Do not access to the reserved area.
(3) Random data is written into the Renesas shipment test area
and the reserved ROM area. Do not rewrite the data in these
areas. Data of these area may be changed without notice.
Accordingly, do not include these areas into programs such
as checksum of all ROM areas.
(4) The QzROM values in function set ROM data 0 to 2 set the
operating modes of the various peripheral functions after an
MCU reset is released. Do not fail to set the value for the
selected function. Bits designated with a fixed value of 1 or
0 must be set to the designated value.
• Function set ROM Area
[Renesas shipment test area]
Figure 8 shows the Assignment of Function set ROM area.
The random data are set to the Renesas shipment test areas
(addresses FFD416 to address FFD716).
Do not rewrite the data of these areas.
When the checksum is included in the user program, avoid
assigning it to these areas.
[Function set ROM data] FSROM0, FSROM1, FSROM2
Function set ROM data 0 to 2 (addresses FFD816 to FFDA16) are
used to set modes of peripheral functions.
By setting values to these areas, the operation mode of each
peripheral function are set after releasing reset.
Refer to the descriptions of peripheral functions for the details of
operation of peripheral functions.
• Clock circuit
• Watchdog timer
• Low voltage detection circuit
Rev.2.00 Mar 05, 2007 Page 11 of 70
REJ03B0202-0200

11 Page







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