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PDF S80C196KB16 Datasheet ( Hoja de datos )

Número de pieza S80C196KB16
Descripción COMMERCIAL/EXPRESS CHMOS MICROCONTROLLER
Fabricantes Intel Corporation 
Logotipo Intel Corporation Logotipo

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S80C196KB16 Hoja de datos, Descripción, Manual
8XC196KB 8XC196KB16
COMMERCIAL EXPRESS CHMOS MICROCONTROLLER
Y 8 Kbytes of On-Chip ROM OTP
Available
Y 232 Byte Register File
Y Register-to-Register Architecture
Y 28 Interrupt Sources 16 Vectors
Y 1 75 ms 16 x 16 Multiply (16 MHz)
Y 3 0 ms 32 16 Divide (16 MHz)
Y Powerdown and Idle Modes
www.DataSheet4U.com Y Five 8-Bit I O Ports
Y 16-Bit Watchdog Timer
Y 12 MHz and 16 MHz Available
Y Dedicated 15-Bit Baud Rate Generator
Y Dynamically Configurable 8-Bit or
16-Bit Buswidth
Y Full Duplex Serial Port
Y High Speed I O Subsystem
Y 16-Bit Timer
Y 16-Bit Up Down Counter with Capture
Y Pulse-Width-Modulated Output
Y Four 16-Bit Software Timers
Y 10-Bit A D Converter with Sample Hold
Y HOLD HLDA Bus Protocol
Y Extended Temperature Available
The 8XC196KB is a 16-bit microcontroller available in three different memory varieties ROMless (80C196KB)
8K ROM (83C196KB) and 8K OTP (One Time Programmable 87C196KB) The 8XC196KB is a high perform-
ance member of the MCS 96 microcontroller family The 8XC196KB has the same peripheral set as the
8096BH and has a true superset of the 8096BH instructions Intel’s CHMOS process provides a high perform-
ance processor along with low power consumption To further reduce power requirements the processor can
be placed into Idle or Powerdown Mode
Bit byte word and some 32-bit operations are available on the 80C196KB With a 16 MHz oscillator a 16-bit
addition takes 0 50 ms and the instruction times average 0 37 ms to 1 1 ms in typical applications
Four high-speed capture inputs are provided to record times when events occur Six high-speed outputs are
available for pulse or waveform generation The high-speed output can also generate four software timers or
start an A D conversion Events can be based on the timer or up down counter Also provided on-chip are an
A D converter serial port watchdog timer and a pulse-width-modulated output signal
The 8XC196KB has a maximum guaranteed frequency of 12 MHz The 8XC196KB16 has a maximum guaran-
teed frequency of 16 MHz All references to the 80C196KB also refer to the 80C196KB16 83C196KB Rxxx
87C196KB and 87C196KB16 unless otherwise noted The ROM device does not have a speed indicator at the
end of the device name Instead it has a ROM code number
With the commercial (standard) temperature option operational characteristics are guaranteed over the tem-
perature range of 0 C to a70 C With the extended temperature range option operational characteristics are
guaranteed over the temperature range of b40 C to a85 C
Package Designators N e 68-pin PLCC S e 80-pin QFP (commercial only) Prefix Designators T e Extend-
ed Temperature
Other brands and names are the property of their respective owners
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
July 1994
Order Number 270909-006

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S80C196KB16 pdf
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8XC196KB 8XC196KB16
NOTE
N C means No Connect (do not connect these pins)
270909 – 4
Figure 4 80-Pin QFP Package
NOTE
The above pin out diagram applies to the OTP (87C196KB) device The OTP device uses all of the programming pins shown
above The ROM (83C196KB) device only uses programming pins AINC PALE PMODE n and PROG The ROMless
(80C196KB) doesn’t use any of the programming pins
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S80C196KB16 arduino
8XC196KB 8XC196KB16
AC CHARACTERISTICS (Continued)
Test Conditions Capacitive load on all pins e 100 pF Rise and fall times e 10 ns FOSC e 12 16 MHz
The 87C196KB will meet these specifications
Symbol
Description
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FXTAL
FXTAL
TOSC
TOSC
TXHCH
TCLCL
TCHCL
TCLLH
TLLCH
TLHLH
TLHLL
TAVLL
TLLAX
TLLRL
TRLCL
TRLRH
TRHLH
TRLAZ
TLLWL
TCLWL
TQVWH
TCHWH
TWLWH
TWHQX
TWHLH
TWHBX
TRHBX
TWHAX
TRHAX
Frequency on XTAL1 12 MHz
Frequency on XTAL1 16 MHz
1 FXTAL 12 MHz
1 FXTAL 16 MHz
XTAL1 High to CLKOUT High or Low
CLKOUT Cycle Time
CLKOUT High Period
CLKOUT Falling Edge to ALE Rising
ALE Falling Edge to CLKOUT Rising
ALE Cycle Time
ALE High Period
Address Setup to ALE Falling Edge
Address Hold after ALE Falling Edge
ALE Falling Edge to RD Falling Edge
RD Low to CLKOUT Falling Edge
RD Low Period
RD Rising Edge to ALE Rising Edge
RD Low to Address Float
ALE Falling Edge to WR Falling Edge
CLKOUT Low to WR Falling Edge
Data Stable to WR Rising Edge
CLKOUT High to WR Rising Edge
WR Low Period
Data Hold after WR Rising Edge
WR Rising Edge to ALE Rising Edge
BHE INST HOLD after WR Rising Edge
BHE INST HOLD after RD Rising Edge
AD8–15 hold after WR Rising Edge
AD8–15 hold after RD Rising Edge
Min Max
3 5 12 0
3 5 16 0
83 3
286
62 5
286
a20
a110
2 TOSC
TOSC b 10 TOSCa10
b10
a10
b15
a15
4 TOSC
TOSC b 10 TOSCa10
TOSC b 20
TOSC b 40
TOSC b 35
a4 a25
TOSCb5
TOSC
TOSC a 25
TOSC a 25
a5
TOSC b 10
0
a25
TOSC b 23
b5
a15
TOSC b 15
TOSC b 15
TOSC b 15
TOSC b 15
TOSC b 10
TOSC b 30
TOSC b 25
TOSC a 5
TOSC a 10
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
(Note 2)
(Note 2)
(Note 3)
(Note 3)
(Note 1)
(Note 3)
(Note 3)
(Note 1)
NOTES
1 Assuming back-to-back bus cycles
2 Testing performed at 3 5 MHz however the device is static by design and will typically operate below 1 Hz
3 When using wait states all 2 TOSCa n where n e number of wait states
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