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PDF M30620MCN Data sheet ( Hoja de datos )

Número de pieza M30620MCN
Descripción M16C/60 series Microprocessors
Fabricantes Renesas 
Logotipo Renesas Logotipo



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To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi
Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
www.DataSheAet4cUc.coormdingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi
Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.
Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been
made to the contents of the document, and these changes do not constitute any alteration to the
contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003

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M30620MCN pdf
Description
Block Diagram
Figure 1.1.3 is a block diagram of the M16C/62N group.
Mitsubishi microcomputers
M16C / 62N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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8 88 8 8 88
I/O ports
Port P0 Port P1 Port P2 Port P3 Port P4 Port P5 Port P6
Internal peripheral functions
Timer
Timer TA0 (16 bits)
Timer TA1 (16 bits)
Timer TA2 (16 bits)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
Timer TB0 (16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
Timer TB3 (16 bits)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
Watchdog timer
(15 bits)
DMAC
(2 channels)
D-A converter
(8 bits X 2 channels)
A-D converter
(10 bits X 8 channels
Expandable up to 18 channels)
System clock generator
XIN-XOUT
XCIN-XCOUT
UART/clock synchronous SI/O
(8 bits X 3 channels)
Clock synchronous SI/O
(8 bits X 2 channels)
CRC arithmetic circuit (CCITT )
(Polynomial : X16+X12+X5+1)
M16C/60 series16-bit CPU core
Registers
R0H R0L
RRR1H01HH RR1RL01LL
RRR232
ARA030
FABA1FB1
SB
Program counter
PC
Stack pointer
ISP
USP
Vector table
INTB
Flag register
FLG
Memory
ROM
(Note 1)
RAM
(Note 2)
Multiplier
Note 1: ROM size depends on MCU type.
Note 2: RAM size depends on MCU type.
Figure 1.1.3. Block diagram of M16C/62N group
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M30620MCN arduino
Memory
Mitsubishi microcomputers
M16C / 62N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Operation of Functional Blocks
The M16C/62N group accommodates certain units in a single chip. These units include ROM and RAM to
store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.
Also included are peripheral units such as timers, serial I/O, D-A converter, DMAC, CRC calculation circuit,
A-D converter, and I/O ports.
The following explains each unit.
Memory
Figure 1.3.1 is a memory map of the M16C/62N group. The address space extends the 1M bytes from
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address 0000016 to FFFFF16. From FFFFF16 down is ROM. For example, in the M30620MCN-XXXFP,
there is 128K bytes of internal ROM from E000016 to FFFFF16. The vector table for fixed interrupts such as
_______
the reset and NMI are mapped to FFFDC16 to FFFFF16. The starting address of the interrupt routine is
stored here. The address of the vector table for timer interrupts, etc., can be set as desired using the
internal register (INTB). See the section on interrupts for details.
From 0040016 up is RAM. For example, in the M30620MCN-XXXFP, 12K bytes of internal RAM is mapped
to the space from 0040016 to 033FF16. In addition to storing data, the RAM also stores the stack used when
calling subroutines and when interrupts are generated.
The SFR area is mapped to 0000016 to 003FF16. This area accommodates the control registers for periph-
eral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Figures 1.6.1 to 1.6.3 are location
of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and cannot be
used for other purposes.
The special page vector table is mapped to FFE0016 to FFFDB16. If the starting addresses of subroutines
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
In memory expansion mode and microprocessor mode, a part of the spaces are reserved and cannot be
used. For example, in the M30620MCN-XXXFP, the following spaces cannot be used.
• The space between 0340016 and 03FFF16 (Memory expansion and microprocessor modes)
• The space between D000016 and DFFFF16 (Memory expansion mode)
RAM size
10K bytes
12K bytes
20K bytes
Address XXXXX16
02BFF16
033FF16
053FF16
ROM size Address YYYYY16
128K bytes
E000016
256K bytes
C000016
0000016
SFR area
For details, see Figures
1.6.1 to 1.6.3
0040016
XXXXX16
0400016
Internal RAM area
Internal reserved
area (Note 1)
External area
D000016
YYYYY16
Internal reserved
area (Note 2)
Internal ROM area
FFFFF16
FFE0016
Special page
vector table
FFFDC16
FFFFF16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
NMI
Reset
Note 1: During memory expansion and microprocessor modes, can not be used.
Note 2: In memory expansion mode, can not be used.
Note 3: These memory maps show an instance in which PM13 is set to 0; but in the
case of products in which the internal RAM and the internal ROM are expanded
to over 15 Kbytes and 192 Kbytes, respectively, they show an instance in which
PM13 is set to 1.
Figure 1.3.1. Memory map
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