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PDF S1D15E06 Data sheet ( Hoja de datos )
| Número de pieza | S1D15E06 | |
| Descripción | Direct RAM data display | |
| Fabricantes | Epson | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de S1D15E06 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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MF1393-05
S1D15E06 Series
www.DataSheet4U.com
Rev. 2.1
1 page  
S1D15E06 Series
3. BLOCK DIAGRAM
VDD
VSS
V3
V2
V1
VC
MV1
MV2
MV3 (VSS)
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CAP1+
CAP1–
CAP2+
CAP2–
VOUT
CAP3+
CAP3–
CAP4+
CAP4–
SEG Drivers
COM Drivers
Decode circuit
Display data latch circuit
Display data RAM
160 x 132 x 2
Column address
Bus holder
Command decoder
MPU Interface
Status
FR
CA
F1
F2
CL
DOF
M/S
CLS
2
EPSON
Rev. 2.1
5 Page 
S1D15E06 Series
5.3 System Bus Connection Pin
Pin name I/O
Description
Number of
pins
D7 to D0
(SI)
(SCL)
I/O Connects to the 8-bit or 16-bit MPU data bus via the 8-bit
bi-directional data bus.
When the serial interface is selected (P/S = LOW), D7 serves as the
serial data input (SI) and D6 serves as the serial clock input (SCL),
In this case, D0 through D5 go to a high impedance state. When the
Chip select is inactive, D0 through D7 go to a high impedance state.
8
A0
RES
I Normally, the least significant bit MPU address bus is connected
to distinguish between data and command.
A0 = HIGH : indicates that D0 to D7 are display data or command parameters.
A0 = LOW : indicates that D0 to D7 are control commands.
I When the RES is LOW, initialization is achieved.
Resetting operation is done on the level of the RES signal.
1
1
CS1
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RD
(E)
I
I
WR
(R/W)
I
C86 I
A chip select signal. When CS1 = LOW and CS2 = HIGH, signals
are active, and data/command input/output are enabled.
• When the 80 series MPU is connected.
A pin for connection of the RD signal of the 80 series MPU.
When this signal is LOW, the data bus of the S1D15E06 series
is in the output state.
• When the 68 series MPU is connected.
Serves as a 68 series MPU enable clock input pin.
• When the 80 series MPU is connected.
A pin for connection of the WR signal of the 80 series MPU.
Signals on the data bus are latched at the leading edge of the
WR signal.
• Serves as a read/write control signal input pin when the 68 series
MPU is connected.
R/W = HIGH : Read
R/W = LOW : Write
A MPU interface switching pin.
C86 = HIGH : 68 series MPU interface
C86 = LOW : 80 series MPU interface
2
1
1
1
P/S I Parallel data input/serial data input select pin
P/S = HIGH : Parallel data input
P/S = LOW : Serial data input
The following Table shows the summary:
1
P/S Data/Command
HIGH
A0
LOW
A0
Data
D0 to D7
SI (D7)
Read/Write Serial clock
RD, WR
Write only SCL (D6)
When P/S = LOW, D0 to D5 are high impedance.
D0 to D5 can be HIGH, LOW or open.
RD(E) and WR(R/W) are locked to HIGH or LOW.
The serial data input does not allow the RAM display data to be read.
8
EPSON
Rev. 2.1
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S1D15E06.PDF ] | |
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