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PDF LM2335 Datasheet ( Hoja de datos )

Número de pieza LM2335
Descripción PLLatinum Low Power Dual Frequency Synthesizer for RF Personal Communications
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo

Total 22 Páginas
		
LM2335 Hoja de datos, Descripción, Manual
PRELIMINARY
June 1999
LMX2335L/LMX2336L
PLLatinumLow Power Dual Frequency Synthesizer for
RF Personal Communications
LMX2335L
LMX2336L
1.1 GHz/1.1 GHz
2.0 GHz/1.1 GHz
General Description
The LMX2335L and LMX2336L are monolithic, integrated
dual frequency synthesizers, including two high frequency
prescalers, and are designed for applications requiring two
RF phase-lock loops. They are fabricated using National’s
0.5µ ABiC V silicon BiCMOS process.
The LMX2335L/36L contains two dual modulus prescalers. A
64/65 or a 128/129 prescaler can be selected for each RF
synthesizer. A second reference divider chain is included in
the IC for improved system noise. The LMX2335L/36L com-
bined with a high quality reference oscillator, two loop filters,
and two external voltage controlled oscillators generates
very stable low noise RF local oscillator signals.
Serial data is transferred into the LMX2335L/36L via a three
wire interface (Data, Enable, Clock). Supply voltage can
range from 2.7V to 5.5V. The LMX2335L/36L feature very
low current consumption; LMX2335L 4.0 mA at 5V,
LMX2336L 5.5 mA at 5V. The LMX2335L is available in SO,
TSSOP and CSP 16-pin surface mount plastic packages.
The LMX2336L is available in a TSSOP 20-pin and CSP
24-pin surface mount plastic package.
Features
n Ultra low current consumption
n 2.7V to 5.5V operation
n Selectable synchronous and asynchronous powerdown
mode:
ICC = 1 µA (typ)
n Dual modulus prescaler: 64/65 or 128/129
n Selectable charge pump TRI-STATE® mode
n Selectable charge pump current levels
n Selectable Fastlockmode
n Upgrade and compatible to LMX2335/36
n Small-outline, plastic, surface mount TSSOP package
n LMX2336 available in CSP package
Applications
n Cellular telephone systems (AMPS, ETACS, RCR-27)
n Cordless telephone systems
(DECT, ISM , PHS, CT-1+)
n Personal Communication Systems
(DCS-1800, PCN-1900)
n Dual Mode PCS phones
n Cable TV Tuners (CATV)
n Other wireless communication systems
Functional Block Diagram
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
Fastlock, MICROWIREand PLLatinumare trademarks of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS012807
DS012807-1
www.national.com

1 page

LM2335 pdf
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Power Supply Voltage
VCC
VP
Voltage on Any Pin
with GND = 0V (VI)
Storage Temperature Range (TS)
Lead Temperature (solder 4 sec.) (TL)
−0.3V to +6.5V
−0.3V to +6.5V
−0.3V to VCC +0.3V
−65˚C to +150˚C
+260˚C
Recommended Operating
Conditions
Power Supply Voltage
VCC 2.7V to 5.5V
VP VCC to +5.5V
Operating Temperature (TA)
−40˚C to +85˚C
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to
the device may occur. Recommended Operating Conditions indicate condi-
tions for which the device is intended to be functional, but do not guarantee
specific performance limits. For guaranteed specifications and test condi-
tions, see the Electrical Characteristics. The guaranteed specifications apply
only for the test conditions listed.
Note 2: This device is a high performance RF integrated circuit with an ESD
rating <2 keV and is ESD sensitive. Handling and assembly of this device
should only be done at ESD protected work stations.
Electrical Characteristics
VCC = 5.0V, VP = 5.0V; TA = 25˚C, except as specified
Symbol
Parameter
Conditions
Value
Units
Min Typ Max
ICC
Power Supply
LMX2335L
VCC = 2.7V to 5.5V
Current
RF1 and RF2
4.0 5.2 mA
ICC LMX2335L RF1 only
ICC LMX2336L
RF1 and RF2
2.0 2.6 mA
5.5 7 mA
LMX2336L RF1 only
3.3 4.3 mA
fIN 1
fIN 2
fIN1
fIN2
ICC-PWDN
fOSC
fOSC
fφ
PfIN
PfIN
VOSC
VIH
VIL
IIH
IIL
IIH
IIL
IDo-SOURCE
Operating
Frequency
LMX2335L
LMX2336L
Powerdown Current LMX2335L/2336L
Oscillator Frequency
Maximum Phase Detector Frequency
RF Input Sensitivity
Oscillator Sensitivity
High-Level Input Voltage
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
Oscillator Input Current
Oscillator Input Current
Charge Pump Output Current
VCC = 5.5V
With resonator load on OSCout
No load on OSCout
VCC = 3.0V, f > 100 MHz
VCC = 5.0V, f > 100 MHz
OSCin
(Note 4)
(Note 4)
VIH = VCC = 5.5V (Note 4)
VIL = 0V, VCC = 5.5V (Note 4)
VIH = VCC = 5.5V
VIL = 0V, VCC = 5.5V
VDo = VP/2, ICPo = LOW
(Note 3)
0.100
0.050
0.200
0.050
5
5
−15
−10
0.5
0.8 VCC
−1.0
−1.0
−100
1
10
−1.25
1.1
1.1
2.0
1.1
10
20
40
0
0
0.2 VCC
1.0
1.0
100
GHz
GHz
GHz
GHz
µA
MHz
MHz
MHz
dBm
VPP
V
V
µA
µA
µA
µA
mA
IDo-SINK
VDo = VP/2, ICPo = LOW
(Note 3)
1.25
mA
IDo-SOURCE
VDo = VP/2, ICPo = HIGH
(Note 3)
−4.25
mA
IDo-SINK
VDo = VP/2, ICPo = HIGH
(Note 3)
4.25
mA
IDo-TRI
Charge Pump
TRI-STATE Current
0.5V VDo VCC − 0.5V
T = 25˚C
−5.0
5.0 nA
VOH High-Level Output Voltage
IOH = −500 µA
VCC
0.4
V
VOL Low-Level Output Voltage
IOL = 500 µA
0.4 V
5 www.national.com

5 Page

LM2335 arduino
Functional Description (Continued)
PROGRAMMABLE DIVIDER (N COUNTER)
Each N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter). If the Control
Bits are 10 or 11 (10 for RF2 counter and 11 for RF1 counter) data is transferred from the 20-bit shift register into a 7-bit latch
(which sets the Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit programmable (B) Counter), MSB first. Serial data
format is shown below.
7-BIT SWALLOW COUNTER DIVIDE RATIO (A COUNTER)
Divide N N N N N N N
Ratio 7 6 5 4 3 2 1
A
0 0000000
1 0000001
• •••••••
127 1 1 1 1 1 1 1
Notes:
Divide ratio: 0 to 127
BA
A<P
DS012807-7
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (B COUNTER)
Divide
Ratio
B
3
4
2047
NNNNNNNNN
18 17 16 15 14 13 12 11 10
000000000
000000001
•••••••••
111111111
Note:
Divide ratio: 3 to 2047 (Divide ratios less than 3 are prohibited)
BA
N
9
1
0
1
N
8
1
0
1
PULSE SWALLOW FUNCTION
fVCO = [(P x B) + A] x fOSC/R
fVCO: Output frequency of external voltage controlled oscillator (VCO)
B: Preset divide ratio of binary 11-bit programmable counter (3 to 2047)
A: Preset divide ratio of binary 7-bit swallow counter
(0 A P; A B)
fOSC: Output frequency of the external reference frequency oscillator
R: Preset divide ratio of binary 15-bit programmable reference counter (3 to 32767)
P: Preset modulus of dual moduIus prescaler (P = 64 or 128)
PROGRAMMABLE MODES
Several modes of operation can be programmed with bits R16–R20 including the phase detector polarity, charge pump tristate
and the output of the FoLD pin. The prescaler and power down modes are selected with bits N19 and N20. The programmable
modes are shown in Table 1. Truth table for the programmable modes and FoLD output are shown in Table 2 and Table 3.
11 www.national.com

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