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Número de pieza | W18NK80Z | |
Descripción | STW18NK80Z | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
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STW18NK80Z
N-channel 800V - 0.34Ω - 19A - TO-247
Zener-protected SuperMESH™ Power MOSFET
General features
Type
STW18NK80Z
VDSS
800V
RDS(on)
<0.38Ω
ID pW
19A 350W
■ Extremely high dv/dt capability
■ 100% avalanche tested
■ Gate charge minimized
■ Very low intrinsic capacitances
■ Very good manufacturing repeatibility
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage MOSFETs including revolutionary
MDmesh™ products.
Applications
■ Switching application
TO-247
Internal schematic diagram
Order codes
Part number
STW18NK80Z
Marking
W18NK80Z
Package
TO-247
Packaging
Tube
October 2006
Rev 4
1/14
www.st.com
14
1 page www.DataSheet4U.com
STW18NK80Z
2 Electrical characteristics
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Drain-source
V(BR)DSS breakdown voltage
IDSS
Zero gate voltage
drain current (VGS = 0)
IGSS
VGS(th)
RDS(on)
Gate-body leakage
current (VDS = 0)
Gate threshold voltage
Static drain-source on
resistance
Test conditions
Min.
ID = 1mA, VGS =0
VDS = max rating
VDS = max rating,
TC = 125°C
VGS = ± 20V
VDS = VGS, ID = 150µA
VGS = 10V, ID = 10A
800
3
Typ. Max. Unit
V
1 µA
50 µA
±10
3.75 4.5
0.34 0.38
µA
V
Ω
Table 6.
Symbol
Dynamic
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Forward
transconductance
VDS = 15V, ID = 10A
19 S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25V, f = 1MHz,
VGS = 0
6100
500
100
pF
pF
pF
Coss
(2)
eq
Equivalent output
capacitance
VGS = 0V, VDS = 0V
to 640V
240 pF
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 400V, ID = 9A
RG = 4.7Ω VGS = 10V
(see Figure 13)
VDD = 640V, ID = 18A,
VGS = 10V
(see Figure 14)
46 ns
32 ns
140 ns
32 ns
192 250 nC
34 nC
102 nC
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
5/14
5 Page www.DataSheet4U.com
STW18NK80Z
4 Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/14
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W18NK80Z | STW18NK80Z | STMicroelectronics |
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