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PDF ICX068AL Data sheet ( Hoja de datos )

Número de pieza ICX068AL
Descripción CCD Image Sensor
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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ICX068AL
Diagonal 4.5mm (Type 1/4) CCD Image Sensor for EIA B/W Video Cameras
Description
The ICX068AL is an interline CCD solid-state image
sensor suitable for EIA black-and-white video cameras.
High sensitivity and low dark current are achieved
through the adoption of HAD (Hole-Accumulation
Diode) sensors.
This chip features a field period readout system and
an electronic shutter with variable charge-storage
time.
The package is a 10mm-square 14-pin DIP (Plastic).
14 pin DIP (Plastic)
Features
High resolution, high sensitivity and low dark current
Horizontal register: 3.6 to 5.0V drive
No voltage adjustment
(Reset gate and substrate bias are not adjusted.)
Low smear
Continuous variable-speed shutter
V
3
Pin 8
Pin 1
2
12
H 40
Device Structure
Interline CCD image sensor
Image size:
Number of effective pixels:
Total number of pixels:
Chip size:
Unit cell size:
Optical black:
Number of dummy bits:
Substrate material:
Optical black position
(Top View)
Diagonal 4.5mm (Type 1/4)
768 (H) × 494 (V) approx. 380K pixels
811 (H) × 508 (V) approx. 410K pixels
4.47mm (H) × 3.80mm (V)
4.75µm (H) × 5.55µm (V)
Horizontal (H) direction: Front 3 pixels, rear 40 pixels
Vertical (V) direction: Front 12 pixels, rear 2 pixels
Horizontal 22
Vertical 1 (even fields only)
Silicon
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E96502D99

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ICX068AL pdf
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ICX068AL
Drive Clock Waveform Conditions
(1) Readout clock waveform
100%
90%
II II
10%
0%
tr
(2) Vertical transfer clock waveform
Vφ1
VVT
twh
tf
Vφ3
φM
φM
2
0V
VVH1
VVHH
VVH
VVHH
VVHL
VVHL
VVHL
VVHH
VVHH
VVH3
VVHL
VVH
VVL1
VVLH
VVLL
VVL
Vφ2
VVHH
VVH2 VVHL
VVHH
VVH
VVHL
VVL3
VVL
Vφ4
VVH
VVHH
VVLL
VVLH
VVHH
VVHL
VVHL
VVH4
VVL2VVLH
VVLL
VVL
VVH = (VVH1 + VVH2)/2
VVL = (VVL3 + VVL4)/2
VφV = VVHn – VVLn (n = 1 to 4)
VVLH
VVLL
VVL4
–5–
VVL

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