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Número de pieza | TA2069AF | |
Descripción | Bipolar Linear Integrated Circuit Silicon Monolithic | |
Fabricantes | Toshiba Semiconductor | |
Logotipo | ||
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TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
TA2069AF
3V Stereo Headphone Amplifier (3V USE)
TA2069AF
The TA2069AF is developed for play−back stereo headphone
equipments (3V use).
It is built in dual preamplifiers, dual OCL power amplifiers,
motor governor, DC volume control and volume limiter etc.
Features
· Built−in preamplifier
Input coupling condenser−less
Built−in input capacitor for reducing buzz noise
Low noise: Vni = 1.2 µVrms (typ.)
· Built−in power amplifier
OCL (output condenser−less)
Voltage gain : GV = 31dB (typ.)
· Built−in motor governor
Current proportion type
· Built−in DC volume control function
DC volume maximum attenuation : ATT = 82dB (typ.)
· Built−in volume limiter function
· Built−in bass boost function
· Operating supply voltage range (Ta = 25°C)
PRE + PW: VCC (opr) = 1.8~3.6V
GVN: VCC (opr) = 2.1~3.6V (motor voltage = 1.8V)
· Low supply current (VCC = 3V, f = 1kHz, Ta = 25°C, typ.)
PRE + PW
Weight: 0.32g (typ.)
No Signal
RL = 16Ω
RL = 32Ω
9.5mA
9.5mA
GVN: ICC = 2.5mA
Output Power
0.1mW × 2
0.5mW × 2
14.2mA
19.5mA
12.5mA
16.5mA
1 2002-10-30
1 page www.DataSheet4U.com
TA2069AF
Application Note
1. VCC and GND
This IC has two VCC terminals and three GND terminals. Pattern layout should be designed carefully to reduce
the common impedance.
VCC
VCC (pin 17): Preamplifier stage and power amplifier stage.
GVN VCC (pin 16): Motor governor stage.
GND
PRE GND (pin 1): Preamplifier stage and power amplifier stage except the power drive stage.
PW GND (pin 11): Power drive stage of power amplifier.
GVN GND (pin 12): Motor governor stage.
2. VREF
It is necessary to stabilize the VREF circuit, the internal circuit operate on this reference.
3. Preamplifier
Input signal should be applied to VREF standard, otherwise pop noise become bigger when VCC is turned on and
off.
4. Power amplifier
It is necessary to insert the coupling capacitor through the PW IN terminal. In case that DC current or DC
voltage is applied to the PW IN terminal, the internal circuit has unbalance and the power amplifier doesn't
operate normally.
Maximum Ratings (Ta = 25°C)
Characteristic
Symbol
Rating
Unit
Supply voltage
Power dissipation
Output current (PW AMP.)
Output current (GVN)
Operating temperature
Storage temperature
VCC
(Note 1)
PD
(Note 2)
IO (PW)
IO (GVN)
Topr
Tstg
4
400
925
200
700
-25~75
-55~150
V
mW
mA
mA
°C
°C
(Note 1) IC only : Derated above Ta = 25°C in the proportion 3.2mW / °C
(Note 2) IC + PCB (TOSHIBA typical PCB): Derated above Ta = 25°C in the proportion 7.4mW / °C
5 2002-10-30
5 Page www.DataSheet4U.com
VO (DC) – Ta
1.5
VREF, PW OUT, PRE OUT
1
0.5
0 − 20
0
20
40
60
Ambient temperature Ta (°C)
80
TA2069AF
PRE
GV , Vom – Ta
40
GV : Vo = −10dBV
Vom : THD = 1%
38
Vom
36
GV
34
800
760
720
680
32 640
30 − 20
0
20 40 60
Ambient temperature Ta (°C)
80600
PRE
1
Vo = −10dBV
THD – Ta
0.1
0.01
0.001 − 20
0
20
40
60
Ambient temperature Ta (°C)
80
PW GV, Po – Ta
35
GV : Vo = −10dBV
Po : THD = 10%
GV
30
Po
50
40
30
20
25 − 20
0
20 40 60
Ambient temperature Ta (°C)
10
80
PW
10
Po = 1mW
5
2
1
0.5
THD – Ta
0.2
0.1 − 20
0
20
40
60
Ambient temperature Ta (°C)
80
GVN
6
∆VREF, ∆K – Ta
4
2
∆K
0
∆VREF
−2
−4
− 6 − 20
0
20 40 60
Ambient temperature Ta (°C)
80
11 2002-10-30
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet TA2069AF.PDF ] |
Número de pieza | Descripción | Fabricantes |
TA2069AF | Bipolar Linear Integrated Circuit Silicon Monolithic | Toshiba Semiconductor |
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