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PDF L4989 Data sheet ( Hoja de datos )
| Número de pieza | L4989 | |
| Descripción | LOW POWER VOLTAGE REGULATOR | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de L4989 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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L4989
Low power voltage regulator
Features
■ Operating DC supply voltage range 5.6V to
31V
■ Very low quiescent current with watchdog
disabled
■ Precision output voltage (3%)
■ Low drop voltage (180mV typ ai Io=150mA)
)■ Reset circuit sensing the output voltage down
t(sto 1V
c■ Programmable reset delay with external
ucapacitor
d■ Watchdog disable input
ro■ Programmable watchdog timer with external
Pcapacitor
te■ Thermal shutdown and short circuit protection
ole■ Wide temperature range (Tj = -40°C to 150°C)
SO-8
SO-20
) - ObsTable 1. Device summary
ct(sPackage
roduSO-8
Obsolete PSO-20
Tube
L4989D
L4989MD
Order codes
Tape & reel
L4989D013TR
L4989MD013TR
November 2008
Rev 3
1/19
www.st.com
19
1 page  
L4989
1
Block diagram and pin configuration
Block diagram and pin configuration
Figure 1. Block diagram
Obsolete Product(s) - Obsolete Product(s)
5/19
5 Page 
L4989
3 Application information
Application information
3.1 Voltage regulator
The voltage regulator uses a p-channel MOS transistor as a regulating element. With this
structure a very low dropout voltage at current up to 150mA is obtained. The output voltage
is regulated up to transient input supply voltage of 40V. No functional interruption due to
over-voltage pulses is generated.The voltage Regulator is always active and not depending
on the state of WEn input pin. A short circuit protection to GND is provided.
Figure 3. Behavior of output current versus regulated voltage Vo
Vo
Vo_ref
duct(s)Ishort Ilim Iout
te Pro3.2 Reset
oleThe reset circuit supervises the output voltage Vo. The Vo_th reset threshold is defined with
sthe in-ternal reference voltage and a resistor output divider. If the output voltage becomes
blower than Vo_th then Res goes low with a reaction time trr. The reset low signal is
Oguaranteed for an output voltage Vo greater than 1V.
) -When the output voltage becomes higher than Vo_th then Res goes high with a delay trd.
t(sThis delay is obtained by an internal oscillator.
cThe oscillator period is given by:
roduTosc = [(Vrhth-Vrlth) x Ctr] / Icr + [(Vrhth-Vrlth) x Ctr] / Idr
Pwhere:
teIcr:
le Idr:
Obso Vrhth, Vrlth:
is an internally generated charge current
is an internally generated discharge current
are two voltages defined with the output voltage and a resistor output
divider
Ctr: is an external capacitance.
trd is given by:
trd = 512 x Tosc
The Reset is always active and not depending on the state of WEn input pin.
11/19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet L4989.PDF ] | |
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