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PDF DFD30N06 Data sheet ( Hoja de datos )

Número de pieza DFD30N06
Descripción N-Channel MOSFET
Fabricantes DnI 
Logotipo DnI Logotipo



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DFD30N06
N-Channel MOSFET
Features
Low RDS(on) (0.04)@VGS=10V
Low Gate Charge (Typical 27nC)
Low Crss (Typical 75pF)
Improved dv/dt Capability
100% Avalanche Tested
Maximum Junction Temperature Range
1.Gate
2.Drain
3.Source
BVDSS = 60V
RDS(ON) = 0.04 ohm
ID = 30A
General Description
This N-channel enhancement mode field-effect power transistor
using DI semiconductor’s advanced planar stripe, DMOS technol-
ogy intended for battery operated systems like a DC-DC converter
motor control , ups ,audio amplifier.
Also, especially designed to minimize rds(on) , low gate charge
and high rugged avalanche characteristics.
TO-252
(D-Pak)
2
1
3
Absolute Maximum Ratings
Symbol
VDSS
ID
IDM
VGS
EAS
dv/dt
PD
TSTG, TJ
TL
Parameter
Drain to Source Voltage
Continuous Drain Current(@TC = 25°C)
Continuous Drain Current(@TC = 100°C)
Drain Current Pulsed
Gate to Source Voltage
Single Pulsed Avalanche Energy
Peak Diode Recovery dv/dt
Total Power Dissipation(@TC = 25 °C)
Derating Factor above 25 °C
Operating Junction Temperature & Storage Temperature
Maximum Lead Temperature for soldering purpose,
1/8 from Case for 5 seconds.
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case to Sink
Thermal Resistance, Junction-to-Ambient
Min.
-
-
-
(Note 1)
(Note 2)
(Note 3)
Value
60
24.5
17.3
98
±20
430
7.0
53
0.35
- 55 ~ 175
300
Value
Typ.
-
0.5
-
Max.
2.85
-
62.5
Units
V
A
A
A
V
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
May, 2006, Rev. 0.
Copyright@ D&I Semiconductor Co., Ltd., All rights reserved.
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DFD30N06 pdf
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Fig. 12. Gate Charge Test Circuit & Waveforms
DFD30N06
12V 200nF 50KO
Same Type
as DUT
VGS
300nF
VGS
VDS
Qgs
DUT
1mA
Qg
Qgd
Charge
Fig 13. Switching Time Test Circuit & Waveforms
VDS
10V
Pulse
RG
Generator
RL
VDD
(0.5 rated VDS)
DUT
VDS 90%
Vin 10%
td(on)
tr
ton
td(off)
tf
toff
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
10V
VDS
ID
RG
L
DUT
VDD
1 BVDSS
EAS = LL IAS2
2 BVDSS - VDD
BVDSS
IAS
ID(t)
tp
VDS(t)
Time
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