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PDF TC581282AXB Data sheet ( Hoja de datos )
| Número de pieza | TC581282AXB | |
| Descripción | 128-MBIT (16M X 8 BITS) CMOS NAND E2PROM | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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TC581282AXB
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
128-MBIT (16M × 8 BITS) CMOS NAND E2PROM
DESCRIPTION
The TC581282A is a single 3.3 V 128-Mbit (138,412,032) bit NAND Electrically Erasable and Programmable
Read-Only Memory (NAND E2PROM) organized as 528 bytes × 32 pages × 1024 blocks. The device has a 528-byte
static register which allows program and read data to be transferred between the register and the memory cell array
in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes
× 32 pages).
The TC581282A is a serial-type memory device which utilizes the I/O pins for both address and data input/output
as well as for command inputs. The Erase and Program operations are automatically executed making the device
most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras
and other systems which require high-density non-volatile memory data storage.
FEATURES
• Organization
Memory cell allay 528 × 32K × 8
Register
528 × 8
Page size
528 bytes
Block size
(16K + 512) bytes
• Modes
Read, Reset, Auto Page Program
Auto Block Erase, Status Read
• Mode control
Serial input/output
Command control
• Power supply
VCC = 2.7 V to 3.6 V
• Program/Erase Cycles 1E5 cycle (with ECC)
• Access time
Cell array to register 25 µs max
Serial Read Cycle 50 ns min
• Operating current
Read (50 ns cycle) 10 mA typ.
Program (avg.)
10 mA typ.
Erase (avg.)
10 mA typ.
Standby
100 µA
• Package
P-TFBGA56-0710-0.80AZ (Weight: g typ.)
PIN ASSIGNMENT (TOP VIEW)
PIN NAMES
12345678
A NC
NC
B NC
NC
C NU CLE NU NU NU NU
D NU ALE NU NU NU NU
E WP WE NU NU NU GND
F NU NU NU NU NU NU
G NU NU NU NU RY/BY NU
H CE I/O1 I/O3 NU NU NU
J RE NU NU VCC I/O8 I/O7
K VSS I/O2 I/O4 I/O6 I/O5 NC
L NC
NC
M NC
NC
I/O1 to I/O8
CE
WE
RE
CLE
ALE
WP
RY/BY
GND
VCC
VSS
I/O port
Chip enable
Write enable
Read enable
Command latch enable
Address latch enable
Write protect
Ready/Busy
Ground input
Power supply
Ground
NU : Not used, NC : Not Connected
000707EBA1
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide
for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
• The information contained herein is subject to change without notice.
2001-12-04 1/31
1 page  
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TC581282AXB
PROGRAMMING AND ERASING CHARACTERISTICS (Ta = −40° to 85°C, VCC = 2.7 V to 3.6 V)
SYMBOL
PARAMETER
MIN
tPROG
Programming Time
N
Number of Programming Cycles on Same
Page
tBERASE
Block Erasing Time
(1): Refer to Application Note (12) toward the end of this document.
TYP.
200 to 300
2
MAX
1000
3
10
UNIT
µs
ms
NOTES
(1)
2001-12-04 5/31
5 Page 
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Auto-Program Operation Timing Diagram
tCLS
CLE
tCLS tCLH
tCS
CE
tCS
tCH
WE
tALH
tALS
tALH
tALS
ALE
TC581282AXB
tPROG
tWB
RE
I/O1
to I/O8
RY/BY
tDS tDH tDS tDH
tDS
tDH
80H
A0 to A7 A9 to A16 A17toA23
DIN0 DIN1
DIN
527
10H
tDS tDH
70H
Status
output
: VIH or VIL
: Do not input data while data is being output.
Auto Block Erase Timing Diagram
CLE
CE
tCLS
tCS
tCLH
tCLS
WE
ALE
tALS
tALH
tWB tBERASE
RE
I/O1
to I/O8
tDS tDH
60H A9 to A16 A17toA23
D0H
70H
Status
output
RY/BY
Auto Block Erase
Setup command
Erase Start
command
Busy
Status Read
command
: VIH or VIL
: Do not input data while data is being output.
2001-12-04 11/31
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