|
|
PDF ICS844003I-01 Data sheet ( Hoja de datos )
| Número de pieza | ICS844003I-01 | |
| Descripción | CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER | |
| Fabricantes | ICS | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ICS844003I-01 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844003I-01
FEMTOCLOCKS™CRYSTAL-TO-LVDS
FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
FEATURES
The ICS844003I-01 is a 3 differential output LVDS
ICS Synthesizer designed to generate Ethernet refer-
HiPerClockS™ ence clock frequencies and is a member of the
HiPerClocks™ family of high performance clock
solutions from ICS. Using a 19.53125MHz or
25MHz, 18pF parallel resonant crystal, the following frequen-
cies can be generated based on the settings of 4 frequency
select pins (DIV_SEL[A1:A0], DIV_SEL[B1:B0]): 625MHz,
312.5MHz, 156.25MHz, and 125MHz. The 844003I-01 has 2
output banks, Bank A with 1 differential LVDS output pair and
Bank B with 2 differential LVDS output pairs.
• Three LVDS outputs on two banks, A Bank with one LVDS
pair and B Bank with 2 LVDS output pairs
• Using a 19.53125MHz or 25MHz crystal, the two output
banks can be independently set for 625MHz, 312.5MHz,
156.25MHz or 125MHz
• Selectable crystal oscillator interface or LVCMOS/LVTTL
single-ended input
• VCO range: 490MHz to 680MHz
• RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz):
0.56ps (typical)
The two banks have their own dedicated frequency select
pins and can be independently set for the frequencies men-
tioned above. The ICS844003I-01 uses ICS’ 3rd generation
low phase noise VCO technology and can achieve 1ps or
lower typical rms phase jitter, easily meeting Ethernet jitter
requirements. The ICS844003I-01 is packaged in a small
24-pin TSSOP package.
• 3.3V output supply mode
• -40°C to 85°C ambient operating temperature
PIN ASSIGNMENT
BLOCK DIAGRAM
CLK_ENA Pullup
DIV_SELA[1:0] Pullup
VCO_SEL Pullup
TEST_CLK Pulldown
0
XTAL_IN
XTAL_OUT
OSC
1
Phase
Detector
VCO
0 0 ÷1
0 1 ÷2
0 1 0 ÷3
1 1 ÷4 (default)
1
DIV_SELB0
VCO_SEL
MR
1
2
3
24 DIV_SELB1
2 3 VDDO_B
22 QB0
VDDO_A
QA0
nQA0
CLK_ENB
CLK_ENA
FB_DIV
VDDA
VDD
DIV_SELA0
4
5
6
7
8
9
10
11
12
21 nQB0
20 QB1
19 nQB1
18 XTAL_SEL
17 TEST_CLK
16 XTAL_IN
15 XTAL_OUT
14 GND
13 DIV_SELA1
ICS844003I-01
24-Lead TSSOP
4.40mm x 7.8mm x 0.92mm
package body
G Package
Top View
QA0
nQA0
XTAL_SEL Pullup
FB_DIV Pulldown
DIV_SELB[1:0] Pullup
MR Pulldown
CLK_ENB Pullup
FB_DIV
0 = ÷25 (default)
1 = ÷32
0 0 ÷2
0 1 ÷4
1 0 ÷5
1 1 ÷8 (default)
QB0
nQB0
QB1
nQB1
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
844003AGI-01
www.icst.com/products/hiperclocks.html
REV. A MAY 31, 2005
1
1 page  
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844003I-01
FEMTOCLOCKS™CRYSTAL-TO-LVDS
FREQUENCY SYNTHESIZER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD
Inputs, VI
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance, θJA
Storage Temperature, TSTG
4.6V
-0.5V to VDD + 0.5V
10mA
15mA
70°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = VDDO_A = VDDO_B = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
VDD
VDDA
VDDO_A, B
IDD
IDDA
IDDO_A, B
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Output Supply Current
3.135 3.3 3.465
3.135 3.3 3.465
3.135 3.3 3.465
102
10
50
Units
V
V
V
mA
mA
mA
TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = VDDA = VDDO_A = VDDO_B = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
VIH Input High Voltage
VDD = 3.3V
VIL Input Low Voltage
VDD = 3.3V
TEST_CLK, MR, FB_DIV
VDD = VIN = 3.465V
IIH
Input
DIV_SELB0, DIV_SELB1,
High Current DIV_SELA0, DIV_SELA1,
VCO_SEL, XTAL_SEL,
VDD = VIN = 3.465V
CLK_ENA, CLK_ENB
2
-0.3
TEST_CLK, MR, FB_DIV VDD = 3.465V, VIN = 0V
-5
I
IL
Input
DIV_SELB0, DIV_SELB1,
Low Current DIV_SELA0, DIV_SELA1,
VCO_SEL, XTAL_SEL,
VDD = 3.465V, VIN = 0V
-150
CLK_ENA, CLK_ENB
VDD + 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
844003AGI-01
www.icst.com/products/hiperclocks.html
5
REV. A MAY 31, 2005
5 Page 
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844003I-01
FEMTOCLOCKS™CRYSTAL-TO-LVDS
FREQUENCY SYNTHESIZER
PACKAGE OUTLINE - G SUFFIX FOR 24 LEAD TSSOP
844003AGI-01
TABLE 8. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
Maximum
N 24
A -- 1.20
A1 0.05 0.15
A2 0.80 1.05
b 0.19 0.30
c 0.09 0.20
D 7.70 7.90
E 6.40 BASIC
E1 4.30 4.50
e 0.65 BASIC
L 0.45 0.75
α 0° 8°
aaa -- 0.10
Reference Document: JEDEC Publication 95, MO-153
www.icst.com/products/hiperclocks.html
11
REV. A MAY 31, 2005
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ICS844003I-01.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ICS844003I-01 | CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER | ICS |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |