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PDF DS3234 Data sheet ( Hoja de datos )
| Número de pieza | DS3234 | |
| Descripción | Extremely Accurate SPI Bus RTC | |
| Fabricantes | Maxim Integrated Products | |
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Rev 0; 2/06
Extremely Accurate SPI Bus RTC with
Integrated Crystal and SRAM
General Description
The DS3234 is a low-cost, extremely accurate SPI™ bus
real-time clock (RTC) with an integrated temperature-
compensated crystal oscillator (TCXO) and crystal. The
DS3234 incorporates a precision, temperature-compen-
sated voltage reference and comparator circuit to moni-
tor VCC. When VCC drops below the power-fail voltage
(VPF), the device asserts the RST output and also dis-
ables read and write access to the part when VCC drops
below both VPF and VBAT. The RST pin is monitored as
a pushbutton input for generating a reset externally. The
device switches to the backup supply input and main-
tains accurate timekeeping when main power to the
device is interrupted. The integration of the crystal res-
onator enhances the long-term accuracy of the device
as well as reduces the piece-part count in a manufactur-
ing line. The DS3234 is available in commercial and
industrial temperature ranges, and is offered in an
industry-standard 300-mil, 20-pin SO package.
The DS3234 also integrates 256 bytes of battery-backed
SRAM. In the event of main power loss, the contents of
the memory are maintained by the power source con-
nected to the VBAT pin. The RTC maintains seconds,
minutes, hours, day, date, month, and year information.
The date at the end of the month is automatically adjust-
ed for months with fewer than 31 days, including correc-
tions for leap year. The clock operates in either the
24-hour or 12-hour format with AM/PM indicator. Two
programmable time-of-day alarms and a programmable
square-wave output are provided. Address and data are
transferred serially by an SPI bidirectional bus.
Applications
Servers
Utility Power Meters
Telematics
GPS
Typical Operating Circuit
VCC
SS
SCLK
MOSI
MISO
RST
CPU
PUSH-
BUTTON
RESET
VCC VPU
CS
SCLK
DIN
DOUT
RST
N.C.
N.C.
N.C.
N.C.
N.C.
VCC
INT/SQW
32kHz
VBAT
DS3234
GND
N.C.
N.C.
N.C.
N.C.
Features
♦ Accuracy ±2ppm from 0°C to +40°C
♦ Accuracy ±3.5ppm from -40°C to +85°C
♦ Battery Backup Input for Continuous
Timekeeping
♦ Operating Temperature Ranges
Commercial: 0°C to +70°C
Industrial: -40°C to +85°C
♦ Low-Power Consumption
♦ Real-Time Clock Counts Seconds, Minutes,
Hours, Day, Date, Month, and Year with Leap Year
Compensation Valid Up to 2099
♦ Two Time-of-Day Alarms
♦ Programmable Square-Wave Output
♦ 4MHz SPI Bus Supports Modes 1 and 3
♦ Digital Temp Sensor Output: ±3°C Accuracy
♦ Register for Aging Trim
♦ RST Input/Output
♦ 300-Mil, 20-Pin SO Package
♦ Underwriters Laboratory (UL) Recognized
Ordering Information
PART
TEMP RANGE PIN-
PACKAGE
TOP
MARK
DS3234S#
0°C to +70°C 20 SO
DS3234S
DS3234SN# -40°C to +85°C 20 SO
DS3234SN
# Denotes a RoHS-compliant device that may include lead that
is exempt under the RoHS requirements. Lead finish is JESD97
Category e3, and is compatible with both lead-based and
lead-free soldering processes. A "#" anywhere on the top mark
denotes a RoHS-compliant device.
Pin Configuration
TOP VIEW
CS 1
N.C. 2
32kHz 3
VCC 4
INT/SQW 5
RST 6
N.C. 7
N.C. 8
N.C. 9
N.C. 10
DS3234
20 SCLK
19 DOUT
18 SCLK
17 DIN
16 VBAT
15 GND
14 N.C.
13 N.C.
12 N.C.
11 N.C.
SPI is a trademark of Motorola, Inc.
SO
______________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Extremely Accurate SPI Bus RTC with
Integrated Crystal and SRAM
Pushbutton Reset Timing
RST
PBDB
tRST
VCC
VPF(MAX)
VPF(MIN)
RST
VPF
tVCCF
Power-Switch Timing
VPF
tVCCR
tREC
WARNING: Negative undershoots below -0.3V while the part is in battery-backed mode may
cause loss of data.
Note 1: Limits at -40°C are guaranteed by design and not production tested.
Note 2: All voltages are referenced to ground.
Note 3: Measured at VIH = 0.8 x VCC or VIL = 0.2 x VCC, 10ns rise/fall time, DOUT = no load.
Note 4: Current is the averaged input current, which includes the temperature conversion current. CRATE1 = CRATE0 = 0.
Note 5: The RST pin has an internal 50kΩ (nominal) pullup resistor to VCC.
Note 6: Measured at VOH = 0.8 x VCC or VOL = 0.2 x VCC. Measured from the 50% point of SCLK to the VOH minimum of DOUT.
Note 7: With 50pF load.
Note 8: The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of
0V ≤ VCC ≤ VCC(MAX) and 2.3V ≤ VBAT ≤ VBAT(MAX).
Note 9: This delay only applies if the oscillator is enabled and running. If the EOSC bit is 1, tREC is bypassed and RST immediately
goes high.
Note 10: Guaranteed by design and not production tested.
_____________________________________________________________________ 5
5 Page 
Extremely Accurate SPI Bus RTC with
Integrated Crystal and SRAM
Real-Time Clock
With the clock source from the TCXO, the RTC provides
seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is automati-
cally adjusted for months with fewer than 31 days, includ-
ing corrections for leap year. The clock operates in either
the 24-hour or 12-hour format with an AM/PM indicator.
The clock provides two programmable time-of-day
alarms and a programmable square-wave output. The
INT/SQW pin either generates an interrupt due to alarm
condition or outputs a square-wave signal and the
selection is controlled by the bit INTCN.
SRAM
The DS3234 provides 256 bytes of general-purpose bat-
tery-backed read/write memory. The SRAM can be writ-
ten or read whenever VCC is above either VPF or VBAT.
Address Map
Figure 1 shows the address map for the DS3234 time-
keeping registers. During a multibyte access, when the
address pointer reaches the end of the register space
(13h read, 93h write), it wraps around to the beginning
(00h read, 80h write). The DS3234 does not respond to a
read or write to any reserved address, and the internal
address pointer does not increment. Address pointer
operation when accessing the 256-byte SRAM data is
covered in the description of the SRAM address and data
registers. On the falling edge of CS, or during a multibyte
access when the address pointer increments to location
00h, the current time is transferred to a second set of reg-
isters. The time information is read from these secondary
registers, while the internal clock registers continue to
increment normally. If the time and date registers are
read using a multibyte read, this eliminates the need to
reread the registers in case the main registers update
during a read.
SPI Interface
The DS3234 operates as a slave device on the SPI seri-
al bus. Access is obtained by selecting the part by the
CS pin and clocking data into/out of the part using the
SCLK and DIN/DOUT pins. Multiple byte transfers are
supported within one CS low period. The SPI on the
DS3234 interface is accessible whenever VCC is above
either VBAT or VPF.
Clock and Calendar
The time and calendar information is obtained by read-
ing the appropriate register bytes. Figure 1 illustrates
the RTC registers. The time and calendar data are set
or initialized by writing the appropriate register bytes.
The contents of the time and calendar registers are in
binary-coded decimal (BCD) format. The DS3234 can
be run in either 12-hour or 24-hour mode. Bit 6 of the
hours register is defined as the 12- or 24-hour mode
select bit. When high, 12-hour mode is selected. In 12-
hour mode, bit 5 is the AM/PM bit with logic-high being
PM. In 24-hour mode, bit 5 is the second 10-hour bit
(20–23 hours). The century bit (bit 7 of the month regis-
ter) is toggled when the years register overflows from
99 to 00.
The day-of-week register increments at midnight.
Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers, sec-
ondary (user) buffers are used to prevent errors when the
internal registers update. When reading the time and date
registers, the user buffers are synchronized to the internal
registers on the falling edge of CS or and when the regis-
ter pointer rolls over to zero. The time information is read
from these secondary registers, while the clock continues
to run. This eliminates the need to reread the registers in
case the main registers update during a read.
The countdown chain is reset whenever the seconds
register is written. Write transfers occur on the acknowl-
edge from the DS3234. Once the countdown chain is
reset, to avoid rollover issues the remaining time and
date registers must be written within 1 second. The 1Hz
square-wave output, if enabled, transitions high 500ms
after the seconds data transfer.
____________________________________________________________________ 11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet DS3234.PDF ] | |
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