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PDF DS28E01-100 Data sheet ( Hoja de datos )
| Número de pieza | DS28E01-100 | |
| Descripción | 1K-Bit Protected 1-Wire EEPROM | |
| Fabricantes | Dallas Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DS28E01-100 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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Abridged Data Sheet
www.maxim-ic.com
DS28E01-100
1K-Bit Protected 1-Wire EEPROM with
SHA-1 Engine
GENERAL DESCRIPTION
The DS28E01-100 combines 1024 bits of EEPROM
with challenge-and-response authentication security
implemented with the ISO/IEC 10118-3 Secure Hash
Algorithm (SHA-1). The 1024-bit EEPROM array is
configured as four pages of 256 bits with a 64-bit
scratchpad to perform write operations. All memory
pages can be write protected, and one page can be
put in EPROM-emulation mode, where bits can only
be changed from a 1 to a 0 state. Each DS28E01-
100 has its own guaranteed unique 64-bit ROM
registration number that is factory lasered into the
chip. The DS28E01-100 communicates over the
single-contact 1-Wire® bus. The communication
follows the standard Dallas Semiconductor 1-Wire
protocol with the registration number acting as node
address in the case of a multi-device 1-Wire network.
APPLICATIONS
Printer Cartridge Configuration and Monitoring
Medical Sensor Authentication and Calibration
System Intellectual Property Protection
TYPICAL OPERATING CIRCUIT
VCC
RPUP
µC
IO
DS28E01
GND
FEATURES
1024 bits of EEPROM memory partitioned into
four pages of 256 bits
On-chip 512-bit SHA-1 engine to compute 160-bit
Message Authentication Codes (MAC) and to
generate secrets
Write access requires knowledge of the secret
and the capability of computing and transmitting
a 160-bit MAC as authorization
User-programmable page write-protection for
page 0, page 3 or all four pages together
User-programmable OTP EPROM emulation
mode for page 1 ("write to 0")
Communicates to host with a single digital signal
at 15.3k bits or 125k bits per second using
1-Wire protocol
Switchpoint Hysteresis and Filtering to Optimize
Performance in the Presence of Noise
Reads and writes over a wide voltage range of
2.8V to 5.25V from -40°C to +85°C
6-lead TSOC, 2-lead SFN or solder-bumped
chipscale surface mount package
ORDERING INFORMATION
PART
TEMP RANGE PIN-PACKAGE
DS28E01P-100
-40°C to 85°C 6-pin TSOC
DS28E01P-100/T&R -40°C to 85°C TSOC Tape & reel
DS28E01P-100+
-40°C to 85°C 6-pin TSOC
DS28E01P-100+T&R -40°C to 85°C TSOC Tape & reel
DS28E01G-100+T&R
-40°C to 85°C
2-pin SFN Tape &
reel
+ Indicates lead-free compliance.
Ordering Information and Pin Configuration continued
at the end of the data sheet.
Request full data sheet at:
www.maxim-ic.com/fullds/DS28E01-100
Commands, Registers, and Modes are capitalized for
clarity.
1-Wire is a registered trademark of Dallas Semiconductor Corp.
PIN CONFIGURATION
GND 1
IO 2
NC 3
6 NC
5 NC
4 NC
TSOC 150 mil
Top view
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
1 of 16
REV: 071207
1 page  
Figure 1. Block Diagram
Abridged Data Sheet
PARASITE POWER
1-Wire net
1-Wire
Function Control
64-bit
Lasered ROM
Memory and
SHA Function
Control Unit
CRC16
Generator
Data Memory
4 Pages of
256 bits each
512-bit
Secure Hash
Algorithm
Engine
64-bit
Scratchpad
Register Page
Secrets Memory
64 bits
DS28E01-100
Figure 2. Hierarchical Structure for 1-Wire Protocol
DS28E01-100
Command
Level:
1-Wire ROM Function
Commands (see Figure 10)
Available
Commands:
Read ROM
Match ROM
Search ROM
Skip ROM
Resume
Overdrive Skip
Overdrive Match
Data Field
Affected:
64-bit Reg. #, RC-Flag
64-bit Reg. #, RC-Flag
64-bit Reg. #, RC-Flag
RC-Flag
RC-Flag
RC-Flag, OD-Flag
64-bit Reg. #, RC-Flag, OD-Flag
Device-specific
Memory Function
Commands (see Figure 8)
For details see the full
version of the data sheet.
5 of 16
5 Page 
Abridged Data Sheet
Figure 10-2. ROM Functions Flow Chart (continued)
To Figure 10, 1st Part
DS28E01-100
From Figure 10
1st Part
A5h
Resume
Command ?
Y
N
RC = 1 ?
Y
N
3Ch
Overdrive
Skip ROM ?
N
Y
RC = 0 ; OD = 1
Master
TX Reset ?
N
Y
69h
Overdrive Match
ROM ?
N
Y
RC = 0 ; OD = 1
Master TX Bit 0
Bit 0
Match ?
Y
N
Master TX Bit 1
Master
TX Reset ?
N
Y
Bit 1
Match ?
Y
N
Master TX Bit 63
From Figure 10
1st Part
To Figure 10
1st Part
Bit 63
Match ?
Y
RC = 1
N
11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet DS28E01-100.PDF ] | |
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