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PDF UPD65881GB-P01 Data sheet ( Hoja de datos )

Número de pieza UPD65881GB-P01
Descripción MOS Integrated Circuit
Fabricantes NEC 
Logotipo NEC Logotipo



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DATA SHEET
MOS Integrated Circuit
μPD65881GB-P01
Product with functions equivalent to those of the
μPD71054 (programmable timer/counter), using the gate array method
The μ PD65881GB-P01 has an IP macro (product name: NA54A macro) included in CMOS gate array CMOS-N5,
and is a product with functions equivalent to those achieved by the μ PD71054 (programmable timer/counter,
discontinued product).
The internal block functions and commands are the same as those of the μ PD71054, so the μ PD65881GB-P01
can be used as a substitute for the μ PD71054.
This product is designed using the gate array method and has therefore some differences and cautions dependent
on the gate array. Before adopting this product, note the disclaimer below and 3. CAUTIONS WHEN CONSIDERING
ADOPTION OF THIS PRODUCT.
Disclaimer (Be sure to read)
• This product does not have functions equivalent to any similar non-NEC Electronics product. NEC Electronics shall assume no
responsibility for any loss or damage incurred by our customers or by third parties resulting from the replacement of products
similar to, but other than the μ PD71054GB-10-3B4.
• NEC Electronics shall assume no responsibility for any loss or damage incurred by our customers or by third parties resulting
from the use of this product outside the conditions described in the absolute maximum ratings, recommended operation range,
and quality grades.
DIFFERENCES WITH THE μPD71054
Item
Part number (mark)
This Product
μ PD65881GB-P01-3BS-A
(658N54)
μ PD71054
μ PD71054GB-10-3B4
(standard NEC mark)
Package type
Only 44-pin QFP
QFP, DIP, QFJ
Package shape (comparison
of 44-pin QFP)
The body size and package width are the same, but the pin lengths
and pin bending method are different.
Function of pin 39
IC (connection with external pin NC
prohibited)
Lead-free support
Yes
No
Recommended soldering
conditions
Absolute maximum ratings
Power supply voltage
Input voltage
Output voltage
Recommended operation
range
DC characteristics
AC characteristics
IR60-207-3, partial heating
IR35-00-3, VP15-00-3,
WS60-00-1, partial heating
0.5 to +6.0 (V)
0.5 to +7.0 (V)
0.5 to +6.0 (V)
0.5 to VDD+0.3 (V)
0.5 to +6.0 (V)
0.5 to VDD+0.3 (V)
TA = −40 to +85°C, VDD = 5 V±10%
This product does not guarantee operation at less than 4.5 V.
Partially different
This product has the following restrictions on load capacitance.
D7 to D0: 150 pF or less
OUT0 to OUT2: 40 pF or less
Reference
4. PACKAGE
DRAWING
1. PIN LAYOUT
ORDERING
INFORMATION
5. RECOMMENDED
SOLDERING CONDITIONS
2. ELECTRICAL
SPECIFICATIONS
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. A18500EJ1V0DS00 (1st edition)
Date Published August 2007 NS
Printed in Japan
© NEC Electronics Corporation 2007

1 page




UPD65881GB-P01 pdf
μ PD65881GB-P01
4. PACKAGE DRAWING
44-PIN PLASTIC QFP (10x10)
A
B
33 23
34 22
CD
44
1
F
G
P
12
11
H IM
J
K
M
NS
LS
NOTE
Each lead centerline is located within 0.16 mm of
its true position (T.P.) at maximum material condition.
5. RECOMMENDED SOLDERING CONDITIONS
detail of lead end
S
R
Q
ITEM
A
B
C
D
F
G
H
I
J
K
L
M
N
P
Q
R
S
MILLIMETERS
13.2±0.2
10.0±0.2
10.0±0.2
13.2±0.2
1.0
1.0
0.37+−00..0087
0.16
0.8 (T.P.)
1.6±0.2
0.8±0.2
0.17+−00..0065
0.10
2.7±0.1
0.125±0.075
3°+−73°°
3.0 MAX.
S44GB-80-3BS-2
These products should be soldered and mounted under the following recommended conditions.
For soldering methods and conditions other than those recommended below, please contact an NEC
Electronicssales representative.
For technical information, see the following website.
Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html)
Soldering Method
Soldering Conditons
Recommended
Condition Symbol
Infrared reflow
Package peak temperature: 260°C, Time: 60 seconds max. (at 220°C or
higher), Count: 3 times or less, Exposure limit: 7 daysNote (after that, prebake
at 125°C for 20 to 72 hours)
IR60-207-3
Partial heating
Pin temperature: 350°C max., Time: 3 seconds max. (per pin row)
Note After opening the dry pack, store it at 25°C or less and 65% RH or less for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating).
Data Sheet A18500EJ1V0DS
5

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