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PDF EM78P153S Data sheet ( Hoja de datos )

Número de pieza EM78P153S
Descripción 8-BIT MICRO-CONTROLLER
Fabricantes ELAN Microelectronics 
Logotipo ELAN Microelectronics Logotipo




1. EM78P153S






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EM78P152/3S
8-Bit Microcontroller
with OTP ROM
Product
Specification
DOC. VERSION 1.6
ELAN MICROELECTRONICS CORP.
March 2007

1 page




EM78P153S pdf
EM78P152/3S
8-Bit Microcontroller with OTP ROM
1 General Description
The EM78P152/3S is an 8-bit microprocessor designed and developed with low-power and high-speed
CMOS technology. It has an on-chip 1024×13-bit Electrical One Time Programmable Read Only Memory
(OTP-ROM). It provides a protection bit to prevent intrusion of user’s OTP memory code. Fifteen Code
option bits are also available to meet user’s requirements.
With its enhanced OTP-ROM feature, the EM78P152/3S provides a convenient way of developing and
verifying user’s programs. Moreover, this OTP device offers the advantages of easy and effective program
updates, using development and programming tools. User can avail of the ELAN Writer to easily program his
development code.
2 Features
„ CPU configuration
1K×13 bits on chip ROM
32×8 bits on-chip registers (SRAM,
general purpose)
5 level stacks for subroutine nesting
Less than 1.5 mA at 5V/4MHz
Typically 15 μA, at 3V/32kHz
Typically 1 μA, during Sleep mode
„ I/O port configuration
2 bidirectional I/O ports : P5, P6
12 I/O pins
Wake-up port : P6
6 Programmable pull-down I/O pins
7 programmable pull-high I/O pins
7 programmable open-drain I/O pins
External interrupt : P60
„ Operating voltage range:
OTP version:
Operating voltage range: 2.3V~5.5V
„ Operating temperature range: 0~70°C
„ Operating frequency range (base on 2 clocks):
Crystal mode:
DC~20MHz/2clks @ 5V; DC~100ns inst. cycle @ 5V
DC~8MHz/2clks @ 3V; DC~250ns inst. cycle @ 3V
DC~4MHz/2clks @ 2.3V; DC~500ns inst. cycle @ 2.3V
ERC mode:
DC~4MHz/2clks @ 5V; DC~500ns inst. cycle @ 5V
DC~4MHz/2clks @ 3V; DC~500ns inst. cycle @ 3V
DC~4MHz/2clks @ 2.3V; DC~500ns inst. cycle @ 2.3V
IRC mode:
Oscillation mode : 4MHz, 8MHz, 1MHz, 455kHz
Process deviation : Typ ± 5.5%, Max ± 6%
Temperature deviation : ±10% (0°C~70°C )
The transient point of system frequency between HXT
and LXT is 400kHz.
„ Peripheral configuration
8-bit real time clock/counter (TCC) with
selective signal sources, trigger edges,
and overflow interrupt
„ Three available interrupts:
TCC overflow interrupt
Input-port status changed interrupt
(wake-up from sleep mode)
External interrupt
„ Special features
Programmable free running watchdog
timer
Power saving Sleep mode
Selectable Oscillation mode
„ Other features
Programmable prescaler of oscillator
set-up time
One security register to prevent intrusion
of user’s OTP memory code
One configuration register to match user’s
requirement
Two clocks per instruction cycle
„ Package type:
14-pin DIP 300mil : EM78P153SP/S/J
14-pin SOP 150mil : EM78P153N/S/J
10-pin SSOP 150mil : EM78P152N/S/J
Note: Green products do not contain hazardous
substances.
Product Specification (V1.6) 03.30.2007
(This specification is subject to change without further notice)
1

5 Page





EM78P153S arduino
EM78P152/3S
8-Bit Microcontroller with OTP ROM
„ The Data Memory Configuration is as follows:
Address
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
2F
R PAGE Registers
R0 (IAR)
R1 (TCC)
R2 (PC)
R3 (Status)
R4 (RSR)
R5 (Port 5)
R6 (Port 6)
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
RF (Interrupt Status)
General Registers
Reserve
CONT
Reserve
Reserve
Reserve
IOC5
IOC6
Reserve
Reserve
Reserve
Reserve
IOCB
IOCC
IOCD
IOCE
IOCF
IOC PAGE Registers
(Control Register)
(I/O Port Control Register)
(I/O Port Control Register)
(Pull-down Register)
(Open-drain Control)
(Pull-high Control Register)
(WDT Control Register)
(Interrupt Mask Register)
Fig. 5-3 Data Memory Configuration
5.1.4 R3 (Status Register)
Bit 7
RST
Bit 6
GP1
Bit 5
GP0
Bit 4
T
Bit 3
P
Bit 2
Z
Bit 1
DC
Bit 0
C
Bit 0 (C): Carry flag
Bit 1 (DC): Auxiliary carry flag
Bit 2 (Z): Zero flag
Set to "1" if the result of an arithmetic or logic operation is zero.
Bit 3 (P):
Power down bit
Set to “1” during power on or by a "WDTC" command; and reset to “0” by a
"SLEP" command.
Bit 4 (T):
Time-out bit
Set to “1” with the "SLEP" and "WDTC" commands, or during power up;
and reset to “0” by WDT time-out.
Bits 5 ~6 (GP0 ~ GP1): General-purpose read/write bits
Bit 7 (RST): Bit for reset type
0 : Set to 0 if the device wakes up from other reset type
1 : Set to 1 if the device wakes up from sleep mode on a pin change
Product Specification (V1.6) 03.30.2007
(This specification is subject to change without further notice)
7

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