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PDF RF5110G Data sheet ( Hoja de datos )

Número de pieza RF5110G
Descripción 3V GSM POWER AMPLIFIER
Fabricantes RF Micro Devices 
Logotipo RF Micro Devices Logotipo



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RoHS & Pb-Free Product
Typical Applications
• 3V GSM Cellular Handsets
• 3V Dual-Band/Triple-Band Handsets
• GPRS Compatible
RF5110G
3V GSM POWER AMPLIFIER
• Commercial and Consumer Systems
• Portable Battery-Powered Equipment
• FM Radio Applications: 150MHz/220MHz/
450 MHz/865 MHz/915 MHz
Product Description
The RF5110G is a high-power, high-efficiency power
amplifier module offering high performance in GSM OR
GPRS applications. The device is manufactured on an
advanced GaAs HBT process, and has been designed for
use as the final RF amplifier in GSM hand-held digital cel-
lular equipment and other applications in the 800MHz to
950MHz band. On-board power control provides over
70dB of control range with an analog voltage input, and
provides power down with a logic “low” for standby opera-
tion. The device is self-contained with 50Ω input and the
output can be easily matched to obtain optimum power
and efficiency characteristics. The RF5110G can be used
together with the RF5111 for dual-band operation. The
device is packaged in an ultra-small 3mmx3mmx1mm
plastic package, minimizing the required board space.
Optimum Technology Matching® Applied
Si BJT
9GaAs HBT
GaAs MESFET
Si Bi-CMOS
SiGe HBT
Si CMOS
InGaP/HBT
GaN HEMT
SiGe Bi-CMOS
16 15 14 13
VCC1 1
12 RF OUT
GND1 2
11 RF OUT
RF IN 3
10 RF OUT
GND2 4
9 RF OUT
5678
-A-
3.00 SQ.
0.15 C A
2 PLCS
1.50 TYP
2 PLCS
0.15 C B
1.00
0.85
0.80
0.65
0.05 C
0.05
0.01
2 PLCS
0.15 C B
-B-
1.37 TYP
12°
MAX
2 PLCS
0.15 C A
2.75 SQ.
Shaded lead is pin 1.
0.60
0.24
TYP
Dimensions in mm.
0.10 M C A B
0.30
0.18
-C-
0.45
0.00
4 PLCS
11..6355SQ.
0.23
0.13
4 PLCS
0.50
0.55
0.30
SEATING
PLANE
Package Style: QFN, 16-Pin, 3x3
Features
• Single 2.7V to 4.8V Supply Voltage
• +36dBm Output Power at 3.5V
• 32dB Gain with Analog Gain Control
• 57% Efficiency
• 800MHz to 950MHz Operation
• Supports GSM and E-GSM
Ordering Information
RF5110G
3V GSM Power Amplifier
RF5110GPCBA-410Fully Assembled Evaluation Board
Functional Block Diagram
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A3 060814
2-1

1 page




RF5110G pdf
RF5110G
Theory of Operation and Application Information
The RF5110G is a three-stage device with 32 dB gain at full power. Therefore, the drive required to fully saturate the out-
put is +3dBm. Based upon HBT (Heterojunction Bipolar Transistor) technology, the part requires only a single positive
3V supply to operate to full specification. Power control is provided through a single pin interface, with a separate Power
Down control pin. The final stage ground is achieved through the large pad in the middle of the backside of the package.
First and second stage grounds are brought out through separate ground pins for isolation from the output. These
grounds should be connected directly with vias to the PCB ground plane, and not connected with the output ground to
form a so called “local ground plane” on the top layer of the PCB. The output is brought out through the wide output pad,
and forms the RF output signal path.
The amplifier operates in near Class C bias mode. The final stage is “deep AB”, meaning the quiescent current is very
low. As the RF drive is increased, the final stage self-biases, causing the bias point to shift up and, at full power, draws
about 2000mA. The optimum load for the output stage is approximately 2.6Ω. This is the load at the output collector, and
is created by the series inductance formed by the output bond wires, vias, and microstrip, and 2 shunt capacitors exter-
nal to the part. The optimum load impedance at the RF Output pad is 2.6-j1.5Ω. With this match, a 50Ω terminal imped-
ance is achieved. The input is internally matched to 50Ω with just a blocking capacitor needed. This data sheet defines
the configuration for GSM operation.
The input is DC coupled; thus, a blocking cap must be inserted in series. Also, the first stage bias may be adjusted by a
resistive divider with high value resistors on this pin to VPC and ground. For nominal operation, however, no external
adjustment is necessary as internal resistors set the bias point optimally.
VCC1 and VCC2 provide supply voltage to the first and second stage, as well as provides some frequency selectivity to
tune to the operating band. Essentially, the bias is fed to this pin through a short microstrip. A bypass capacitor sets the
inductance seen by the part, so placement of the bypass cap can affect the frequency of the gain peak. This supply
should be bypassed individually with 100pF capacitors before being combined with VCC for the output stage to prevent
feedback and oscillations.
The RF OUT pin provides the output power. Bias for the final stage is fed to this output line, and the feed must be capa-
ble of supporting the approximately 2A of current required. Care should be taken to keep the losses low in the bias feed
and output components. A narrow microstrip line is recommended because DC losses in a bias choke will degrade effi-
ciency and power.
While the part is safe under CW operation, maximum power and reliability will be achieved under pulsed conditions. The
data shown in this data sheet is based on a 12.5% duty cycle and a 600μs pulse, unless specified otherwise.
The part will operate over a 3.0V to 5.0V range. Under nominal conditions, the power at 3.5V will be greater than
+34.5dBm at +90°C. As the voltage is increased, however, the output power will increase. Thus, in a system design, the
ALC (Automatic Level Control) Loop will back down the power to the desired level. This must occur during operation, or
the device may be damaged from too much power dissipation. At 5.0V, over +38dBm may be produced; however, this
level of power is not recommended, and can cause damage to the device.
The HBT breakdown voltage is >20V, so there are no issue with overvoltage. However, under worst-case conditions, with
the RF drive at full power during transmit, and the output VSWR extremely high, a low load impedance at the collector of
the output transistors can cause currents much higher than normal. Due to the bipolar nature of the devices, there is no
limitation on the amount of current de device will sink, and the safe current densities could be exceeded.
High current conditions are potentially dangerous to any RF device. High currents lead to high channel temperatures and
may force early failures. The RF5110G includes temperature compensation circuits in the bias network to stabilize the
RF transistors, thus limiting the current through the amplifier and protecting the devices from damage. The same mecha-
nism works to compensate the currents due to ambient temperature variations.
To avoid excessively high currents it is important to control the VAPC when operating at supply voltages higher than 4.0V,
such that the maximum output power is not exceeded.
Rev A3 060814
2-5

5 Page





RF5110G arduino
RF5110G
Evaluation Board Schematic
GSM900 Lumped Element
J3
VAPC
50 Ω μstrip
VCC VCC
VAPC
VCC1
C2
10 nF
C3
1 nF
C19
27 pF
L1
11 nH
C17
10 nF
C16
10 nF
C15
47 pF
16 15 14 13
1 12
C18
3.3 μF
C13
1 nF
C14
47 pF
P1-1
P1
1 VCC
P1-2 2 VCC
3 GND
4 GND
CON4
P2-1
P2
1 VAPC
2 GND
3 GND
CON3
J1
RF IN
50 Ω μstrip
C1
56 pF
R1
180 Ω
2 11
3 10
49
5678
VCC2
+ C21
3.3 μF
L2 L6
10 Ω Ferrite 1.6 nH
C5
10 nF
C6
1 nF
C20
15 pF
C23
27 pF
C7
27 pF
C8
1.5 pF
L3
8.8 nH
55 mils
C9
15 pF
C10
11 pF
39 mils
C9 and C10 share
the same pad.
L4
3.6 nH
C11*
5.6 pF
C12
56 pF
50 Ω μstrip
*C11 is
adjacent to L4.
J2
RF OUT
C23 and C27 share
the same pad.
Rev A3 060814
2-11

11 Page







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