PDF XRT94L33 Data sheet ( Hoja de datos )

Número de pieza	XRT94L33
Descripción	highly integrated SONET/SDH terminator
Fabricantes	Exar Corporation
Logotipo
Hay una vista previa y un enlace de descarga de XRT94L33 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas
No Preview Available ! www.DataSheet4U.com 333---CCCHHHAAANNNNNNEEELLL DDDSSS333///EEE333///SSSTTTSSS---111 TTTOOO SSSTTTSSS---333///SSSTTTMMM---111 MMMAAAPPPPPPEEERRR ––– AAATTTMMM RRREEEGGGIIISSSTTTEEERRRSSS March 2007 GENERAL DESCRIPTION FEATURES XRT94L33 Rev 2.0.0 The XRT94L33 is a highly integrated SONET/SDH terminator designed for E3/DS3/STS-1 mapping/de-mapping functions from either the STS-3 or STM-1 data stream. The XRT94L33 interfaces directly to the optical transceiver The XRT94L33 processes the section, line and path overhead in the SONET/SDH data stream and also performs ATM and PPP PHY-layer processing. The processing of path overhead bytes within the STS-1s or TUG-3s includes 64 bytes for storing the J1 bytes. Path overhead bytes can be accessed through the microprocessor interface or via serial interface. The XRT94L33 uses the internal E3/DS3 De- Synchronizer circuit with an internal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. These De-Synchronizer circuits do not need any external clock reference for its operation. The SONET/SDH transmit blocks allow flexible insertion of TOH and POH bytes through both Hardware and Software. Individual POH bytes for the transmitted SONET/SDH signal are mapped either from the XRT94L33 memory map or from external interface. A1, A2 framing pattern, C1 byte and H1, H2 pointer byte are generated. The SONET/SDH receive blocks receive SONET STS-3 signal or SDH STM-1 signal and perform the necessary transport and path overhead processing. The XRT94L33 provides a line side APS (Automatic Protection Switching) interface by offering redundant receive serial interface to be switched at the frame boundary. The XRT94L33 provides 3 Mappers for performing STS-1/VC-3 to STS-1/DS3/E3 mapping function, one for each STS-1/DS3/E3 framers. A PRBS test pattern generation and detection is implemented to measure the bit-error performance. A general-purpose microprocessor interface is included for control, configuration and monitoring. APPLICATIONS • Network switches • Add/Drop Multiplexer • W-DCS Digital Cross Connect Systems • Provides DS3/ E3 mapping/de-mapping for up to 3 tributaries through SONET STS-1 or SDH AU- 3 and/or TUG-3/AU-4 containers • Generates and terminates SONET/SDH section, line and path layers • Integrated SERDES with Clock Recovery Circuit • Provides SONET frame scrambling and descrambling • Integrated Clock Synthesizer that generates 155 MHz and 77.76 MHz clock from an external 12.96/19.44/77.76 MHz reference clock • Integrated 3 E3/DS3/STS-1 De-Synchronizer circuit that de-jitter gapped clock to meet 0.05UIpp jitter requirements • Access to Line or Section DCC • Level 2 Performance Monitoring for E3 and DS3 • Supports mixing of STS-1E and DS3 or E3 and DS3 tributaries • UTOPIA Level 2 interface for ATM or level 2P for Packets • E3 and DS3 framers for both Transmit and Receive directions • Complete Transport/Section Overhead Processing and generation per Telcordia and ITU standards • Single PHY and Multi-PHY operations supported • Full line APS support for redundancy applications • Loopback support for both SONET/SDH as well as E3/DS3/STS-1 • Boundary scan capability with JTAG IEEE 1149 • 8-bit microprocessor interface • 3.3 V ± 5% Power Supply; 5 V input signal tolerance • -40°C to +85°C Operating Temperature Range Available in a 504 Ball TBGA package E Corporation 48720 Kato Road, Fremont CA, 94538 * (510) 668-7000 * Fax (510) 668-7017 * www.exar.com 1 page Rev222...000...000 XRT94L33 333---CCCHHHAAANNNNNNEEELLL DDDSSS333///EEE333///SSSTTTSSS---111 TTTOOO SSSTTTSSS---333///SSSTTTMMM---111 MMMAAAPPPPPPEEERRR ––– AAATTTMMM RRREEEGGGIIISSSTTTEEERRRSSS – Byte 0 0x015E Reserved 0x015F Operation – DS3/E3/STS-1 Frequency Out of Range Interrupt Status Register – Byte 0 0x0160 – 0x017F Reserved 0x0180 APS Mapping Register 0x0181 APS Control Register 0x0182 – 0x0193 Reserved 0x0194 APS Status Register 0x0195 Reserved 0x0196 APS Status Register 0x0197 APS Status Register 0x0198 APS Interrupt Register 0x0199 Reserved 0x019A APS Interrupt Register 0x019B APS Interrupt Register 0x019C APS Interrupt Register 0x019D Reserved 0x019E APS Interrupt Enable Register 0x019F APS Interrupt Enable Register 0x01A0 – 0x01FF Reserved 0x0302 LINE INTERFACE CONTROL REGISTERS Receive Line Interface Control Register – Byte 1 0x0303 Receive Line Interface Control Register – Byte 0 0x0304 – 0x0306 Reserved 0x0307 Receive Line Status Register 0x0308 -0x030A Reserved 0x030B Receive Line Interrupt Register 0x030C – 0x030E Reserved 0x030F Receive Line Interrupt Enable Register 0x0310 – 0x0382 Reserved 0x0383 Transmit Line Interface Control Register 0x0384 – 0x0502 Reserved RECEIVE/TRANSMIT UTOPIA INTERFACE REGISTERS 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 5 5 Page Rev222...000...000 XRT94L33 333---CCCHHHAAANNNNNNEEELLL DDDSSS333///EEE333///SSSTTTSSS---111 TTTOOO SSSTTTSSS---333///SSSTTTMMM---111 MMMAAAPPPPPPEEERRR ––– AAATTTMMM RRREEEGGGIIISSSTTTEEERRRSSS 0x1713 Redundant Receive STS-3 Transport B1 Error Count – Byte 0 0x1714 Redundant Receive STS-3 Transport B2 Error Count – Byte 3 0x1715 Redundant Receive STS-3 Transport B2 Error Count – Byte 2 0x1716 Redundant Receive STS-3 Transport B2 Error Count – Byte 1 0x1717 Redundant Receive STS-3 Transport B2 Error Count – Byte 0 0x1718 Redundant Receive STS-3 Transport REI-L Error Count – Byte 3 0x1719 Redundant Receive STS-3 Transport REI-L Error Count – Byte 2 0x171A Redundant Receive STS-3 Transport REI-L Error Count – Byte 1 0x171B Redundant Receive STS-3 Transport REI-L Error Count – Byte 0 0x171C Reserved 0x171D - 0 x171E Reserved 0x171F Redundant Receive STS-3 Transport K1 Value 0x1720 – 0x1722 Reserved 0x1723 Redundant Receive STS-3 Transport K2 Value 0x1724 – 0x1726 Reserved 0x1727 Redundant Receive STS-3 Transport S1 Value 0x1728 – 0x172A Reserved 0x172B Redundant Receive STS-3 Transport – In-Sync Threshold Value 0x172C, 0x172D Reserved 0x172E Redundant Receive STS-3 Transport – LOS Threshold Value – MSB 0x172F Redundant Receive STS-3 Transport – LOS Threshold Value – LSB 0x1730 Reserved 0x1731 Redundant Receive STS-3 Transport – SF Set Monitor Interval – Byte 2 0x1732 Redundant Receive STS-3 Transport – SF Set Monitor Interval – Byte 1 0x1733 Redundant Receive STS-3 Transport – SF Set Monitor Interval – Byte 0 0x1734 – 0x1735 Reserved 0x1736 Redundant Receive STS-3 Transport – SF Set Threshold – Byte 1 0x1737 Redundant Receive STS-3 Transport – SF Set Threshold – Byte 0 0x1738, 0x1739 Reserved 0x173A Redundant Receive STS-3 Transport – SF Clear Threshold – Byte 1 0x173B Redundant Receive STS-3 Transport – SF Clear Threshold – Byte 0 0x173C Reserved 0x173D Redundant Receive STS-3 Transport – SD Set Monitor Interval – Byte 2 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFF 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 11 11 Page

Páginas	Total 30 Páginas
PDF Descargar	[ Datasheet XRT94L33.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
XRT94L31	3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER	Exar Corporation
XRT94L33	highly integrated SONET/SDH terminator	Exar Corporation

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar