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PDF XRT75R12 Data sheet ( Hoja de datos )
| Número de pieza | XRT75R12 | |
| Descripción | TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT | |
| Fabricantes | Exar Corporation | |
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PRELIMINARY
XRT75R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
OCTOBER 2003
GENERAL DESCRIPTION
The XRT75R12 is a twelve channel fully integrated
Line Interface Unit (LIU) featuring EXAR’s R3
Technology (Reconfigurable, Relayless Redundancy)
for E3/DS3/STS-1 applications. The LIU incorporates
12 independent Receivers, Transmitters and Jitter
Attenuators in a single 420 Lead TBGA package.
Each channel of the XRT75R12 can be
independently configured to operate in E3 (34.368
MHz), DS3 (44.736 MHz) or STS-1 (51.84 MHz).
Each transmitter can be turned off and tri-stated for
redundancy support or for conserving power.
The XRT75R12’s differential receiver provides high
noise interference margin and is able to receive data
over 1000 feet of cable or with up to 12 dB of cable
attenuation.
The XRT75R12 incorporates an advanced crystal-
less jitter attenuator per channel that can be selected
either in the transmit or receive path. The jitter
REV. P1.0.2
attenuator performance meets the ETSI TBR-24 and
Bellcore GR-499 specifications.
The XRT75R12 provides a Parallel Microprocessor
Interface for programming and control.
The XRT75R12 supports analog, remote and digital
loop-backs. The device also has a built-in Pseudo
Random Binary Sequence (PRBS) generator and
detector with the ability to insert and detect single bit
error for diagnostic purposes.
APPLICATIONS
• E3/DS3 Access Equipment
• DSLAMs
• Digital Cross Connect Systems
• CSU/DSU Equipment
• Routers
• Fiber Optic Terminals
FIGURE 1. BLOCK DIAGRAM OF THE XRT 75R12
CS
RD
WR
Addr[7:0]
D[7:0]
PCLK
RDY
INT
Pmode
RESET
RTIP_n
RRing_n
TTIP_n
TRing_n
MTIP_n
MRing_n
DMO_n
ICT
µProcessor Interface
XRT75R12
XRT75R12
Peak Detector
AGC/
Equalizer
Slicer
Local
LoopBack
Clock & Data
Recovery
LOS
Detector
Clock
Synthesizer
Jitter
Attenuator
MUX
Remote
LoopBack
HDB3/
B3ZS
Decoder
Line
Driver
Device
Monitor
Tx
Pulse
Shaping
Tx
Control
Timing
Control
Jitter
Attenuator
MUX
HDB3/
B3ZS
Encoder
Channel 0
Channel n...
Channel 11
CLKOUT_n
SFM_en
RLOL_n
E3Clk
DS3Clk
STS-Clk/12M
RxClk_n
RxPOS_n
RxNEG/LCV_n
RLOS_n
TxClk_n
TxPOS_n
TxNEG_n
TxON
PART NUMBER
XRT75R12IB
ORDERING INFORMATION
PACKAGE
420 Lead TBGA
OPERATING TEMPERATURE RANGE
-40°C to +85°C
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
1 page  
XRT75R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
PRELIMINARY
REV. P1.0.2
TABLE 22: THE ABOVE IS: CHANNEL LEVEL INTERRUPT STATUS REGISTER - CR97 (ADDRESS LOCATION = 0X61) .................................. 63
TABLE 23: CHANNEL LEVEL INTERRUPT STATUS REGISTER - CR225 (ADDRESS LOCATION = 0XE1)....................................................... 63
TABLE 24: DEVICE/PART NUMBER REGISTER - CR110 (ADDRESS LOCATION = 0X6E) ........................................................................... 64
TABLE 25: CHIP REVISION NUMBER REGISTER - CR111 (ADDRESS LOCATION = 0X6F) ......................................................................... 64
THE PER-CHANNEL REGISTERS........................................................................................................................... 65
REGISTER DESCRIPTION - PER CHANNEL REGISTERS .................................................................................... 66
TABLE 26: XRT75R12 REGISTER MAP SHOWING INTERRUPT ENABLE REGISTERS (IER_N).................................................................. 66
TABLE 27: SOURCE LEVEL INTERRUPT ENABLE REGISTER - CHANNEL N ADDRESS LOCATION = 0XM1 .................................................... 66
TABLE 28: XRT75R12 REGISTER MAP SHOWING INTERRUPT STATUS REGISTERS (ISR_N).................................................................. 68
TABLE 29: SOURCE LEVEL INTERRUPT STATUS REGISTER - CHANNEL N ADDRESS LOCATION = 0XM2 .................................................... 68
TABLE 30: XRT75R12 REGISTER MAP SHOWING ALARM STATUS REGISTERS (AS_N) .......................................................................... 70
TABLE 31: ALARM STATUS REGISTER - CHANNEL N ADDRESS LOCATION = 0XM3................................................................................... 70
TABLE 32: XRT75R12 REGISTER MAP SHOWING TRANSMIT CONTROL REGISTERS (TC_N)................................................................... 74
TABLE 33: TRANSMIT CONTROL REGISTER - CHANNEL N ADDRESS LOCATION = 0XM4 ........................................................................... 74
TABLE 34: XRT75R12 REGISTER MAP SHOWING RECEIVE CONTROL REGISTERS (RC_N) .................................................................... 76
TABLE 35: RECEIVE CONTROL REGISTER - CHANNEL N ADDRESS LOCATION = 0XM5 ............................................................................. 76
TABLE 36: XRT75R12 REGISTER MAP SHOWING CHANNEL CONTROL REGISTERS (CC_N) ................................................................... 77
TABLE 37: CHANNEL CONTROL REGISTER - CHANNEL N ADDRESS LOCATION = 0XM6 ............................................................................ 77
TABLE 38: XRT75R12 REGISTER MAP SHOWING JITTER ATTENUATOR CONTROL REGISTERS (JA_N) ................................................... 80
TABLE 39: JITTER ATTENUATOR CONTROL REGISTER - CHANNEL N ADDRESS LOCATION = 0XM7 ........................................................... 80
TABLE 40: XRT75R12 REGISTER MAP SHOWING ERROR COUNTER MSBYTE REGISTERS (EM_N)........................................................ 81
TABLE 41: ERROR COUNTER MSBYTE REGISTER - CHANNEL N ADDRESS LOCATION = 0XMA................................................................. 81
TABLE 42: XRT75R12 REGISTER MAP SHOWING ERROR COUNTER LSBYTE REGISTERS (EL_N).......................................................... 82
TABLE 43: ERROR COUNTER LSBYTE REGISTER - CHANNEL N ADDRESS LOCATION = 0XMB.................................................................. 82
TABLE 44: XRT75R12 REGISTER MAP SHOWING ERROR COUNTER HOLDING REGISTERS (EH_N) ........................................................ 82
TABLE 45: ERROR COUNTER HOLDING REGISTER - CHANNEL N ADDRESS LOCATION = 0XMC ................................................................ 83
8.0 ELECTRICAL CHARACTERISTICS ................................................................................................... 84
TABLE 46: ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................. 84
TABLE 47: DC ELECTRICAL CHARACTERISTICS:..................................................................................................................................... 84
ORDERING INFORMATION .................................................................................................................. 85
PACKAGE DIMENSIONS - .............................................................................................................................................. 85
REVISIONS .................................................................................................................................................................. 86
III
5 Page 
PRELIMINARY
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R12
REV. P1.0.2
RECEIVE LINE SIDE PINS
PIN #
SIGNAL NAME
TYPE
B22
AE22
B18
AE18
A14
AF14
D13
AC13
B9
AE9
B5
AE5
RTip0
RTip1
RTip2
RTip3
RTip4
RTip5
RTip6
RTip7
RTip8
RTip9
RTip10
RTip11
I
C22
AD22
C18
AD18
B14
AE14
C13
AD13
C9
AD9
C5
AD5
RRing0
RRing1
RRing2
RRing3
RRing4
RRing5
RRing6
RRing7
RRing8
RRing9
RRing10
RRing11
I
DESCRIPTION
Receive TIP Input
These input pins along with the corresponding RRing_n input pin function as the
Receive DS3/E3/STS-1 Line input signal for a given channel of the XRT75R12.
Cconnect this signal and the corresponding RRING_n input signal to a 1:1
transformer.
Whenever the RTIP/RRING input pins are receiving a positive-polarity pulse
within the incoming DS3, E3 or STS-1 line signal, this input pin will be pulsed to
a higher voltage than its corresponding RRING_n input pin.
Conversely, whenever the RTIP/RRING input pins are receiving a negative-
polarity pulse within the incoming DS3, E3 or STS-1 line signal, this input pin
will be pulsed to a lower voltage than its corresponding RRING_n input pin.
Receive Ring Input
These input pins along with the corresponding RTIP_n input pin function as the
Receive DS3/E3/STS-1 Line input signal for a given channel of the XRT75R12.
Connect this signal and the corresponding RTIP_n input signal to a 1:1 trans-
former. (See Figure 6)
Whenever the RTIP/RRING input pins are receiving a positive-polarity pulse
within the incoming DS3, E3 or STS-1 line signal, then this input pin will be
pulsed to a lower voltage than its corresponding RTIP_n input pin.
Conversely, whenever the RTIP/RRING input pins are receiving a negative-
polarity pulse within the incoming DS3, E3 or STS-1 line signal, then this input
pin will be pulsed to a higher voltage than its corresponding RTIP_n input pin.
8
11 Page | ||
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| PDF Descargar | [ Datasheet XRT75R12.PDF ] | |
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