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PDF XR17V258 Data sheet ( Hoja de datos )

Número de pieza XR17V258
Descripción 66MHZ PCI BUS OCTAL UART
Fabricantes Exar Corporation 
Logotipo Exar Corporation Logotipo



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XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
NOVEMBER 2005
GENERAL DESCRIPTION
The XR17V2581 (V258) is a single chip 8-channel
66MHz PCI (Peripheral Component Interconnect)
UART (Universal Asynchronous Receiver and
Transmitter) solution, optimized for higher
performance and lower power. The V258 device with
its fifth generation register set is designed to meet the
high bandwidth and power management
requirements for multi-serial communication ports for
system administration and management. The 32-bit
66MHz PCI interface is compliant with PCI 3.0 and
PCI power management revision 1.1 specifications.
The device provides an upgrade path for Exar’s
33MHz 5V and Universal PCI UART family of
products in a 144-pin LQFP package.
The V258 consists of eight independent UART
channels, each with set of configuration and
enhanced registers, 64 bytes of Transmit (TX) and
Receive (RX) FIFOs, and a fractional Baud Rate
Generator (BRG). A global interrupt source register
provides a complete interrupt status indication for all
8-channels to speed up interrupt parsing. The V258
device operates at 33/66MHz and features fully
programmable TX and RX FIFO level triggers,
automatic hardware and software flow control, and
automatic RS-485 half duplex direction control output
for software and hardware design simplification.
NOTE 1: Covered by U.S. Patents #5,649,122 and #5,949,787
APPLICATIONS
Remote Access Servers
Storage Network Management
REV. 1.0.0
Factory Automation and Process Control
Instrumentation
Multi-port RS-232/RS-422/RS-485 Cards
Point-of-Sale Systems
FEATURES
High performance 32-bit 66MHz PCI UART
PCI 3.0 compliance
PCI power management rev. 1.1 compliance
EEPROM interface for PCI configuration
3.3V supply with 5V tolerant non-PCI (serial) inputs
Data read/write burst operation
Global interrupt register for all eight UART channels
Up to 8 Mbps serial data rate
Eight multi-purpose inputs/outputs
A 16-bit general purpose timer/counter
Sleep mode with wake-up Indicator
Eight independent UART channels controlled with
16C550 compatible register Set
64-byte TX and RX FIFOs with level counters
and programmable trigger levels
Fractional baud rate generator
Automatic RTS/CTS or DTR/DSR hardware
flow control with programmable hysteresis
Automatic Xon/Xoff software flow control
RS-485 half duplex direction control output
with selectable turn-around delay
Infrared (IrDA 1.0) data encoder/decoder
Programmable data rate with prescaler
FIGURE 1. BLOCK DIAGRAM OF THE XR17V258
AD [31 :0]
C /B E#[3:0]
PAR
F R AM E #
T R D Y#
IR D Y#
STOP#
D E VS E L #
ID S E L#
33/66MH z CLK
RST#
P E RR #
S E RR #
IN TA#
PME#
E N IR
EECK
EEDI
EEDO
EECS
PCI Local
Bus
Int erfa ce
C o n fig u r atio n
Space
R e giste rs
E E PR OM
In te rfa c e
G lo b a l
C onfiguration
R egisters
16-bit
T ime r/C ounte r
UAR T C hannel 0
UA RT
Re gs
64-b yte TX FIFO
TX & RX
IR
EN D EC
BR G 64-b yte RX FIFO
UART Channel 1
UART Channel 2
UART Channel 3
UART Channel 4
UART Channel 5
UART Channel 6
UART Channel 7
M u lti -p u rp o s e
In puts/Ou tputs
C rystal Osc/B uffer
T X[7:0]
R X[7:0]
R TS#[7:0]
D TR #[7:0]
C TS #[7:0]
D SR #[7:0]
D CD #[7:0]
R I#[7:0]
M PIO [7:0]
X TAL1/C LK
XTAL2
TMRCK
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

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XR17V258 pdf
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REV. 1.0.0
PIN DESCRIPTIONS
NAME
RI3#
TX4
RX4
PIN #
95
88
81
RTS4#
CTS4#
DTR4#
DSR4#
CD4#
RI4#
TX5
RX5
86
82
87
83
84
85
80
71
RTS5#
CTS5#
DTR5#
DSR5#
CD5#
RI5#
TX6
RX6
78
72
79
75
76
77
62
55
RTS6#
CTS6#
DTR6#
DSR6#
CD6#
RI6#
TX7
60
56
61
57
58
59
54
XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
TYPE
DESCRIPTION
I UART channel 3 Ring Indicator or general purpose input (active LOW).
O UART channel 4 Transmit Data or infrared transmit data.
I UART channel 4 Receive Data or infrared receive data. Normal RXD input
idles at HIGH condition. The infrared pulses can be inverted prior to decoding
by setting FCTR bit [4].
O UART channel 4 Request to Send or general purpose output (active LOW).
I UART channel 4 Clear to Send or general purpose input (active LOW).
O UART channel 4 Data Terminal Ready or general purpose output (active
LOW).
I UART channel 4 Data Set Ready or general purpose input (active LOW).
I UART channel 4 Carrier Detect or general purpose input (active LOW).
I UART channel 4 Ring Indicator or general purpose input (active LOW).
O UART channel 5 Transmit Data or infrared transmit data.
I UART channel 5 Receive Data or infrared receive data. Normal RXD input
idles at HIGH condition. The infrared pulses can be inverted prior to decoding
by setting FCTR bit [4].
O UART channel 5 Request to Send or general purpose output (active LOW).
I UART channel 5 Clear to Send or general purpose input (active LOW).
O UART channel 5 Data Terminal Ready or general purpose output (active
LOW).
I UART channel 5 Data Set Ready or general purpose input (active LOW).
I UART channel 5 Carrier Detect or general purpose input (active LOW).
I UART channel 5 Ring Indicator or general purpose input (active LOW).
O UART channel 6 Transmit Data or infrared transmit data.
I UART channel 6 Receive Data or infrared receive data. Normal RXD input
idles at HIGH condition. The infrared pulses can be inverted prior to decoding
by setting FCTR bit [4].
O UART channel 6 Request to Send or general purpose output (active LOW).
I UART channel 6 Clear to Send or general purpose input (active LOW).
O UART channel 6 Data Terminal Ready or general purpose output (active
LOW).
I UART channel 6 Data Set Ready or general purpose input (active LOW).
I UART channel 6 Carrier Detect or general purpose input (active LOW).
I UART channel 6 Ring Indicator or general purpose input (active LOW).
O UART channel 7 Transmit Data or infrared transmit data.
5

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XR17V258 arduino
xr
REV. 1.0.0
XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
TABLE 1: PCI LOCAL BUS CONFIGURATION SPACE REGISTERS
ADDRESS
OFFSET
BITS
TYPE
DESCRIPTION
RESET VALUE
(HEX OR BINARY)
0x24 31:0
RO Unimplemented Base Address Register (returns zeros)
0x00000000
0x28 31:0
RO Reserved
0x00000000
0x2C 31:16
EWR Subsystem ID (write from external EEPROM by customer)
0x0000
15:0 EWR Subsystem Vendor ID (write from external EEPROM by cus-
tomer)
0x0000
0x30 31:0
RO Expansion ROM Base Address (Unimplemented)
0x00000000
0x34 31:8
RO Reserved (returns zeros)
0x000000
7:0 RO Capability Pointer (Implemented for Power Management)
0x40
0x38 31:0
RO Reserved (returns zeros)
0x00000000
0x3C 31:24
RO Unimplemented MAXLAT
0x00
23:16
RO Unimplemented MINGNT
0x00
15:8 RO Interrupt Pin, use INTA#.
0x01
7:0 RWR Interrupt Line.
0xXX
NOTE: EWR=Read/Write from external EEPROM. RWR=Read/Write from AD[31:0]. RO= Read Only. RWC=Read/Write-
Clear.
1.2 Power Management Registers
The Power Management Registers are implemented in 2 DWORDs starting at address offset 0x40 of the PCI
local bus configuration space. The bit definitions of these registers are shown in Table 2 below. The V258
complies with Revision 1.1 of the PCI Power Management Interface Specification.
ADDRESS
OFFSET
0x40
0x44
TABLE 2: POWER MANAGEMENT REGISTERS
BITS
TYPE
DESCRIPTION
31:16 See Below
31:27
RO
26:20
RO
19
18:16
RO
RO
15:8 RO
7:0 RO
31:24
RO
23:16
RO
15:0 See Below
15 RWC
14:9 RO
Power Management Capabilities (PMC)
PME Support (PME# can be asserted from D3hot only)
Reserved or Not Supported
PME Clock (PCI clock is required for PME# generation)
Version
Next Item Pointer
Capability ID
Unimplemented Data Register
Unimplemented Bridge Support Extensions
Power Management Control/Status Register (PMCSR)
PME_Status
Reserved
RESET VALUE
(HEX OR BINARY)
See Below
01000b
0000000b
1b
010b
0x00
0x01
0x00
0x00
See Below
0b
00000b
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