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PDF BD3537F Data sheet ( Hoja de datos )

Número de pieza BD3537F
Descripción Termination Regulators
Fabricantes ROHM Semiconductor 
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Datasheet
Termination Regulator for DDR-SDRAMs
BD3537F
General Description
BD3537F is a termination regulator that complies with
JEDEC requirements for DDR-SDRAM, This linear
power supply uses a built-in N-channel MOSFET and
high-speed OP-AMPS specially designed to provide
excellent transient response. It has a sink/source
current capability up to 1.8A and has a power supply
bias requirement of 5.0V for driving the N-channel
MOSFET. For BD3537F, ceramic capacitor can be
used as output capacitor enabling significant package
profile downsizing as the total regulator part.
Features
Incorporates a Push-Pull Power Supply for
Termination (VTT)
Incorporates an Enabler
Incorporates an Undervoltage Lockout (UVLO)
Incorporates a Thermal Shutdown Protector (TSD)
Compatible with Dual Channel (DDR-II)
Incorporates Soft-start Function
Applications
Power supply for DDR I/II - SDRAM
Key Specifications
Termination Input Voltage Range:
1.746V to 1.854V
VCC Input Voltage Range:
4.75V to 5.25V
Output Current:
1.8A (Max)
High side FET ON-Resistance:
0.3Ω(Typ)
Low side FET ON-Resistance:
0.3Ω(Typ)
Standby Current:
50µA (Typ)
Operating Temperature Range: -30°C to +100°C
Package
W(Typ) x D(Typ) x H(Max)
SOP8
5.00mm x 6.20mm x 1.71mm
Typical Application Circuit, Block Diagram
C1
VCC
C4
VDDQ
R1
R2
REF
VTT_IN
C2
VTT_IN
Reference
Block
Thermal
Protection
VCC
-
+ UVLO
TSD
Enable
Block
EN
VCC
+
-
TSD
EN
UVLO
- VCC
+
TSD
EN
UVLO
VTT
C3
VTT
GND
Product structureSilicon monolithic integrated circuit
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
This product has no designed protection against radioactive rays
1/15
TSZ02201-0J2J0A900970-1-2
02.Nov.2015 Rev.001

1 page




BD3537F pdf
BD3537F
Typical Waveforms continued
VTT
REF
VTT_IN
VCC
Figure 5. Input Sequence 1
VTT
REF
VTT_IN
VCC
Figure 7. Input Sequence 3
VTT
REF
VTT_IN
VCC
Figure 6. Input Sequence 2
VREF(500mV/div)
VVTT(500mV/div)
IVTT_IN(50mA/div)
Figure 8. Soft Start
(100µsec/div)
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
5/15
TSZ02201-0J2J0A900970-1-2
02.Nov.2015 Rev.001

5 Page





BD3537F arduino
BD3537F
Operational Notes continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin A
Pin B
C
B
E
Pin B
P+
NN
Parasitic
Elements
P P+
NN
P Substrate
GND
Parasitic
Elements
N P+
N P N P+ N
P Substrate
Parasitic
GND GND
Elements
Figure 11. Example of monolithic IC structure
B
N Region
close-by
C
E
Parasitic
Elements
GND
13. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will exceed 175°C which will activate the TSD circuit that will turn OFF all output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
14. Capacitor Across Output and GND
If a large capacitor is connected between the output pin and ground pin, current from the charged capacitor can flow
into the output pin and may destroy the IC when the VCC or IN pin is shorted to ground or pulled down to 0V. Use a
capacitor smaller than 1000µF between output and ground.
15. Output Capacitor
Do not fail to connect a output capacitor to VTT output terminal for stabilization of output voltage. The output capacitor
works as a loop gain phase compensator and an output voltage variation reducer in the event of sudden change in
load. Insufficient capacitance may cause an oscillation. And if the equivalent series resistance (ESR) of this capacitor
is high, the variation in output increases in the event of sudden change in load. It is recommended to connect a 10 μF
or so ceramic capacitor, though it depends on ambient temperature and load conditions. It is therefore requested to
carefully check under the actual temperature and load conditions to be applied.
16. Input Capacitor s Setting
These input capacitors are used to reduce the output impedance of power supply to be connected to the input
terminals (VCC and VTT_IN). Increase in the power supply output impedance may result in oscillation or degradation
in ripple rejecting characteristics. It is recommended to use a low temperature coefficient 1μF (for VCC) and 10μF (for
VTT_IN) capacitor, but it depends on the characteristics of the power supply input, and the capacitance and
impedance of the pc board wiring pattern. It is therefore requested to carefully check under the actual temperature
and load conditions to be applied.
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
11/15
TSZ02201-0J2J0A900970-1-2
02.Nov.2015 Rev.001

11 Page







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