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PDF NCP5382 Data sheet ( Hoja de datos )

Número de pieza NCP5382
Descripción 2/3/4/5/6 Phase Buck Controller
Fabricantes ON Semiconductor 
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No Preview Available ! NCP5382 Hoja de datos, Descripción, Manual

NCP5382
2/3/4/5/6 Phase Buck
Controller for VR10 and
VR11 Pentium IV Processor
Applications
The NCP5382 is a two−, three−, four−, five−, or six−phase buck
controller which combines differential voltage and current sensing,
and adaptive voltage positioning to power Intel’s most demanding
Pentium® IV Processors and low voltage, high current power
supplies. Dual−edge pulse−width modulation (PWM) combined with
inductor current sensing reduces system cost by providing the fastest
initial response to transient loads thereby requiring less bulk and
ceramic output capacitors to satisfy transient load−line requirements.
A high performance operational error amplifier is provided, which
allows easy compensation of the system. The proprietary method of
Dynamic Reference Injection (patented) makes the error amplifier
compensation virtually independent of the system response to VID
changes, eliminating the need for tradeoffs between load transients
and Dynamic VID performance.
Features
Meets Intel’s VR 10.0, 10.1, 10.2, and 11.0 Specifications
Dual−Edge PWM for Fastest Initial Response to Transient Loading
High Performance Operational Error Amplifier
www.DataSheet4U.com Supports both VR11 and Legacy VR10 Soft−Start Modes
Dynamic Reference Injection (Patent# 7057381)
8−Bit DAC per Intel’s VR11 Specifications
DAC Range from 0.5 V to 1.6 V
"0.5% System Voltage Accuracy
Remote Temperature Sensing per VR11
2, 3, 4, 5 or 6−Phase Operation
True Differential Remote Voltage Sensing Amplifier
Phase−to−Phase Current Balancing
“Lossless” Differential Inductor Current Sensing
Differential Current Sense Amplifiers for each Phase
Adaptive Voltage Positioning (AVP)
Fixed No−Load Voltage Positioning at –19 mV
Frequency Range: 100 kHz–1.0 MHz
Threshold Sensitive Enable Pin for VTT Sensing
Power Good Output with Internal Delays
Programmable Soft−Start Time
Operates from 12 V
This is a Pb−Free Device*
Applications
Pentium IV Processors
VRM Modules
Graphics Cards
Low Voltage, High Current Power Supplies
http://onsemi.com
1 48
48 PIN QFN, 7x7
MN SUFFIX
CASE 485K
MARKING
DIAGRAM
1
NCP5382
AWLYYWWG
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*Pin 49 is the thermal pad on the bottom of the device.
ORDERING INFORMATION
Device
Package
Shipping
NCP5382MNR2G QFN−48 2500 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 0
1
Publication Order Number:
NCP5382/D

1 page




NCP5382 pdf
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
VID_SEL
VR_EN
VR_RDY
VTT
680 W PULLUPS
+12 V
RVCC
CVCC1
RISO1 RT2 RISO2
CFB1
RFB1
RFB
RDRP
CD1
RD1
CF RF
U20
VCC
VID0
DGND
VID1
VID2
AGND
OSC2_IN
VID3
VREF
VID4 OSC2_OUT
VID5
VID6
VID7
VR10/11
G1
CS1
CS1N
EN
VR_RDY
G2
CS2
CS2N
VS−
VS+
G3
CS3
CS3N
NCP5382
G4
CS4
CS4N
DIFFOUT
VFB
VDRP
G5
CS5
CS5N
G6
CS6
CS6N
ROSC2
COMP
DRVON
ILIM ROSC SS
CH RLIM1
CSS
NCP5382
12 V_FILTER
D1
BAT54HT1
C3
BST 1
4
DRVH
VCC SW
8
7
3 OD DRVL 5
2 IN PGND 6
C1 NCP3418B
NTD85N02RT4
12 V_FILTER
12 V_FILTER
C4
NTD60N02RT4
L1
R2
RS1
C2
CS1
12 V_FILTER
BST 1
4
DRVH
VCC SW
8
7
3 OD DRVL 5
2 IN PGND 6
12 V_FILTER
BST 1
4
DRVH
VCC SW
8
7
3 OD DRVL 5
2 IN PGND 6
12 V_FILTER
12 V_FILTER
BST 1
4
DRVH
VCC SW
8
7
3 OD DRVL 5
2 IN PGND 6
12 V_FILTER
RLIM2
12 V_FILTER
BST 1
4
DRVH
VCC SW
8
7
3 OD DRVL 5
2 IN PGND 6
12 V_FILTER
RT2 LOCATED NEAR OUTPUT INDUCTORS
VCCP
VSSP
Figure 4. Application Schematic for Five Phases
http://onsemi.com
5
+
CPU GND

5 Page





NCP5382 arduino
NCP5382
ELECTRICAL CHARACTERISTICS
(0°C < TA < 70°C; 0°C < TJ < 85°C; 10.8 V < VCC < 13.2 V; All DAC Codes; CVCC = 0.1 mF, FSW = 400 kHz, unless otherwise stated)
Parameter
Test Conditions
Min Typ Max Units
Modulators (PWM Comparators)
Minimum Pulse Width
Fs = 400 kHz
− 30 40 ns
Magnitude of the PWM Ramp
− 1.0 − V
0% Duty Cycle
COMP voltage when the PWM
1.2
−V
outputs remain LO
100% Duty Cycle
COMP voltage when the PWM
2.3
−V
outputs remain HI
Minimum PWM Linear Duty Cycle
(Note 1)
FS = 400 kHz
− 90 − %
PWM Comparator Offset Mismatch
(Note 1)
Phase Angle Error
Propagation Delay (Note 1)
Between any 2 phases,
FS = 400 kHz
Between adjacent phases,
FS = 400 kHz
Ramp/Comp crossing to Gx
high
−15
20
40 mV
15 °
− ns
Propagation Delay (Note 1)
Ramp/Comp crossing to Gx low
20
− ns
PWM Outputs
Output High Voltage
Sourcing 500 mA
3.3 4.0 4.7 V
Output Low Voltage
Sinking 500 mA
− 25 100 mV
Rise Time
Fall Time
CL = 20 pF, DVo = 0.3 to 2.0 V
10
− ns
CL = 20 pF, DVo = Vmax to
10
− ns
0.7 V
Output Impedance – LO State
Resistance to GND (Gx = LO)
50
W
G5 or G6 Gate Pin Source Current
during Phase Detect
− 70 − mA
Phase Detection Period
− 50 − ms
G5 or G6 Phase Detect Threshold
Resistance
− − 1.0 kW
Gate Driver Enable (DRVON)
Output High Voltage
Sourcing 500 mA
4.0 5.3 5.5 V
Output Low Voltage
Sinking 500 mA
− 50 200 mV
Rise Time
CL (PCB) = 20 pF,
DVo = 10% to 90%
− 25 − ns
Fall Time
CL (PCB) = 20 pF,
DVo = 10% to 90%
− 25 − ns
Internal Pulldown Resistance
OSC2
VCC < UVLO Threshold
− 70 140 kW
OSC2_IN Voltage Threshold
− 2.5 − V
OSC2_IN Decreasing Hysterisis
− 1.0 − V
OSC2_OUT Voltage Output HIGH
@ 1.0 mA
3.0 −
−V
OSC2_OUT Voltage Output LOW
@ 1.0 mA
− − 1.0 V
1. Guaranteed by design. Not tested in production.
http://onsemi.com
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