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PDF 908E625 Datasheet ( Hoja de datos )

Número de pieza 908E625
Descripción Integrated Quad Half H-Bridge
Fabricantes Freescale Semiconductor 
Logotipo Freescale Semiconductor Logotipo

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908E625 Hoja de datos, Descripción, Manual
Freescale Semiconductor
Technical Data
MM908E625
Rev 4.0, 09/2005
Integrated Quad Half H-Bridge
with Power Supply, Embedded
MCU, and LIN Serial
Communication
The 908E625 is an integrated single-package solution including a
high-performance HC08 microcontroller with a SMARTMOSTM
analog control IC. The HC08 includes Flash Memory, a timer,
Enhanced Serial Communications Interface (ESCI), an Analog-to-
Digital Converter (ADC), Serial Peripheral Interface (SPI) (only
internal), and an Internal Clock Generator (ICG) module. The analog
control die provides fully protected H-Bridge/high-side outputs,
voltage regulator, autonomous watchdog with cyclic wake-up, and
Local Interconnect Network (LIN) physical layer.
The single-package solution, together with LIN, provides optimal
application performance adjustments and space-saving PCB design.
It is well suited for the control of automotive mirror, door lock, and
light-levelling applications.
908E625
H-BRIDGE POWER SUPPLY WITH
EMBEDDED MCU AND LIN
DWB SUFFIX
98ARL105910
54-TERMINAL SOICWB-EP
Features
www.DataSheet4U.com
• High-Performance M68HC908EY16 Core
• 16 K Bytes of On-Chip Flash Memory
• 512 Bytes of RAM
• Internal Clock Generation Module
• Two 16-bit, 2-Channel Timers
• 10-Bit Analog-to-Digital Converter
• LIN Physical Layer
• Autonomous Watchdog with Cyclic Wakeup
• Three Two-Terminal Hall-Effect Sensor Input Ports
• One Analog Input with Switchable Current Source
• Four Low RDS(ON) Half-Bridge Outputs
• One Low RDS(ON) High-Side Output
• 13 Micro Controller I/Os
LIN
VREFH
VDDA
EVDD
VDD
3 908E625
VSUP
VREFL
VSSA
EVSS
VSS
RST
RST_A
IRQ
IRQ_A
SS
PTB1/AD1
RXD
PTE1/RXD
PTD1/TACH1
FGEN
BEMF
PTD0/TACH0/BEMF
GND EP
2
ORDERING INFORMATION
Device
MM908E625ACDWB
Temperature
Range (TA)
-40°C to 85°C
Package
54 SOICW
EP
HB1
HB2
HB3
HB4
HS
HVDD
H1
H2
H3
PA1
Port A I/Os
Port B I/Os
Port C I/Os
M
M
M
4 Half-Bridges
Controlling
3 Loads
High-Side
Output
Switchable Internal
VDD Output
Three
2-Terminal Hall-Effect
Sensor Inputs
Analog Input with
Current Source
Microcontroller
Ports
Figure 1. 908E625 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2005. All rights reserved.

1 page

908E625 pdf
TERMINAL CONNECTIONS
Table 1. 908E625 Terminal Definitions (continued)
A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 15.
Terminal
Function
Terminal
Terminal Name
Formal Name
Definition
Analog
41
RXD
LIN Transceiver Output This terminal is the output of LIN transceiver.
EP
Exposed Pad
Exposed Pad
The exposed pad terminal on the bottom side of the package
conducts heat from the chip to the PCB board.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E625
5

5 Page

908E625 arduino
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
All characteristics are for the analog chip only. Please refer to the specification for 68HC908EY16 for characteristics of the
microcontroller chip. Characteristics noted under conditions 9.0 V VSUP 16 V, -40°C TJ 125°C unless otherwise noted.
Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max Unit
LIN PHYSICAL LAYER
Propagation Delay (12), (13)
TXD LOW to LIN LOW
TXD HIGH to LIN HIGH
LIN LOW to RXD LOW
LIN HIGH to RXD HIGH
TXD Symmetry
RXD Symmetry
Output Falling Edge Slew Rate (12), (14)
80% to 20%
µs
t TXD-LIN-low
– 6.0
t TXD-LIN-high
– 6.0
t LIN-RXD-low
4.0 8.0
t LIN-RXD-
4.0 8.0
high -2.0 –
2.0
t TXD-SYM
- 2.0
2.0
t RXD-SYM
SRF V/µs
-1.0 -2.0 -3.0
Output Rising Edge Slew Rate (12), (14)
20% to 80%, RBUS > 1.0 k, CBUS < 10 nF
SRR
V/µs
1.0 2.0 3.0
LIN Rise/Fall Slew Rate Symmetry (12), (14)
SRS
- 2.0
2.0 µs
HALL-EFFECT SENSOR INPUTS (H1:H3)
Propagation Delay
t HPPD
1.0
µs
AUTONOMOUS WATCHDOG (AWD)
AWD Oscillator Period
t OSC
40
µs
AWD Period Low = 512 tOSC
t AWDPH
16
22
28
ms
AWD Period High = 256 tOSC
t AWDPL
8.0
11
14
ms
AWD Cyclic Wake-Up On Time
t AWDHPON
90
µs
Notes
12. All LIN characteristics are for initial LIN slew rate selection (20 kBaud) (SRS0:SRS1= 00).
13. See Figure 2.
14. See Figure 3.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E625
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