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PDF W3EG6467S-D4 Data sheet ( Hoja de datos )

Número de pieza W3EG6467S-D4
Descripción 512MB - 2x32Mx64 DDR SDRAM UNBUFFERED
Fabricantes White Electronic 
Logotipo White Electronic Logotipo



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White Electronic Designs
W3EG6467S-D4
ADVANCED*
512MB – 2x32Mx64 DDR SDRAM UNBUFFERED
FEATURES
DDR200, DDR266, DDR333 and DDR400
• JEDEC design specifications
Double-data-rate architecture
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Dual Rank
Power supply: 2.5V ± 0.20V
200www.DataSheet4U.com pin SO-DIMM package
• Package height options
D4: 35.5mm (1.38")
DESCRIPTION
The W3EG6467S is a 2x32Mx64 Double Data Rate
SDRAM memory module based on 512Mb DDR SDRAM
component. The module consists of eight 32Mx16 DDR
SDRAMs in 66 pin TSOP packages mounted on a 200
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data 1/0 transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
NOTE: Consult factory for availability of:
• RoHS compliant products
• Vendor source control options
• Industrial temperature option
Clock Speed
CL-tRCD-tRP
DDR400@CL=3
200MHz
3-3-3
OPERATING FREQUENCIES
DDR333@CL=2.5
166MHz
2.5-3-3
DDR266@CL=2
133MHz
2-2-2
DDR266@CL=2.5
133MHz
2.5-3-3
DDR200@CL=2
100MHz
2-2-2
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
January 2005
Rev. 1
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

1 page




W3EG6467S-D4 pdf
White Electronic Designs
W3EG6467S-D4
ADVANCED
IDD SPECIFICATIONS AND TEST CONDITIONS
0°C ≤ TA ≤ 70°C, VCCQ = 2.5V ±0.2V, VCC = 2.5V ±0.2V
Parameter
Symbol Conditions
DDR403
@CL=3
Max
DDR333
@CL=2.5
Max
DDR266
@CL=2, 2.5
Max
Operating Current
One device bank; Active - Precharge;
tRC=tRC(MIN); tCK=tCK(MIN); DQ,DM and
IDD0 DQS inputs changing once per clock cycle;
Address and control inputs changing once
every two cycles.
1600 1440
Operating Current
One device bank; Active-Read-Precharge;
IDD1
Burst = 2; tRC=tRC(MIN);tCK=tCK(MIN); Iout =
0mA; Address and control inputs changing
once per clock cycle.
1800 1640
Precharge Power-
Down Standby Current
Idle Standby Current
IDD2P
All device banks idle; Power- down mode;
tCK=tCK(MIN); CKE=(low)
CS# = High; All device banks idle;
IDD2F
tCK=tCK(MIN); CKE = high; Address and other
control inputs changing once per clock cycle.
Vin = Vref for DQ, DQS and DM.
48 48
400 320
Active Power-Down
Standby Current
IDD3P
One device bank active; Power-down mode;
tCK(MIN); CKE=(low)
CS# = High; CKE = High; One device
bank; Active-Precharge; tRC=tRAS(MAX);
Active Standby Current
IDD3N
tCK=tCK(MIN); DQ, DM and DQS inputs
changing twice per clock cycle; Address and
other control inputs changing once per clock
cycle.
560 480
880 720
Operating Current
Operating Current
Burst = 2; Reads; Continous burst; One
IDD4R
device bank active;Address and control
inputs changing once per clock cycle;
tCK=tCK(MIN); Iout = 0mA.
Burst = 2; Writes; Continous burst; One
device bank active; Address and control
IDD4W inputs changing once per clock cycle;
tCK=tCK(MIN); DQ,DM and DQS inputs
changing twice per clock cycle.
2160 1840
2160 1800
Auto Refresh Current
Self Refresh Current
Operating Current
IDD5 tRC=tRC(MIN)
IDD6 CKE 0.2V
Four bank interleaving Reads (BL=4)
with auto precharge with tRC=tRC (MIN);
IDD7A tCK=tCK(MIN); Address and control inputs
change only during Active Read or Write
commands.
2240 2000
48 48
3120 2960
DDR200
@CL=2
Max
1360
Units
mA
1560 mA
48 mA
320 mA
480 mA
720 mA
1840 mA
1800 mA
2000 mA
48 mA
2720 mA
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
January 2005
Rev. 1
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

5 Page





W3EG6467S-D4 arduino
White Electronic Designs
W3EG6467S-D4
ADVANCED
ORDERING INFORMATION FOR D4
Part Number
Speed
Height*
Commercial Operating Range
W3EG6467S403D4
200MHz/400Mbps, CL=3
35.05 (1.38") MAX
0°C to 70°C
W3EG6467S335D4
166MHz/333Mbps, CL=2.5
35.05 (1.38") MAX
0°C to 70°C
W3EG6467S262D4
133MHz/266Mbps, CL=2
35.05 (1.38") MAX
0°C to 70°C
W3EG6467S265D4
133MHz/266Mbps, CL=2.5
35.05 (1.38") MAX
0°C to 70°C
W3EG6467S202D4
100MHz/200Mbps, CL=2
35.05 (1.38") MAX
0°C to 70°C
NOTES:
• Consult Factory for availability of RoHS compliant products. (G = RoHS Compliant)
• Vendor specific part numbers are used to provide memory components source control. The place holder for this is shown as lower case “x” in the part numbers above and is to
be replaced with the respective vendors code. Consult factory for qualified sourcing options. (M = Micron, S = Samsung & consult factory for others)
• Consult factory for availability of industrial temperature (-40°C to 85°C) option
PACKAGE DIMENSIONS FOR D4
3.98 ± 0.1
(0.157 ± 0.004)
2.0
(0.079)
67.56
(2.66) MAX.
2.31
(0.091) REF.
P1
11.40
(0.449)
4.19
(0.165)
1.80
(0.071)
47.40
(1.866)
3.81
(0 .150) MAX.
35.05
(1.38) MAX.
20
(0.787)
3.98
(0.157) MIN.
1.0 ± 0.1
(0.039 ± 0.004)
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES)
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
January 2005
Rev. 1
11 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

11 Page







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