DataSheet.es    


PDF X5001 Data sheet ( Hoja de datos )

Número de pieza X5001
Descripción CPU Supervisor
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



Hay una vista previa y un enlace de descarga de X5001 (archivo pdf) en la parte inferior de esta página.


Total 20 Páginas

No Preview Available ! X5001 Hoja de datos, Descripción, Manual

®
Data Sheet
CPU Supervisor
FEATURES
• 200ms power-on reset delay
• Low VCC detection and reset assertion
—Five standard reset threshold voltages
—Adjust low VCC reset threshold voltage using
special programming sequence
—Reset signal valid to VCC = 1V
• Selectable nonvolatile watchdog timer
—0.2, 0.6, 1.4 seconds
—Off selection
—Select settings through software
• Long battery life with low power consumption
—<50µA max standby current, watchdog on
—<1µA max standby current, watchdog off
• 2.7V to 5.5V operation
• SPI mode 0 interface
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Watchdog change latch
• High reliability
• Available packages
— 8 Ld TSSOPwww.DataSheet4U.com
—8 Ld SOIC
—8 Ld PDIP
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
SI
SO
SCK
CS/WDI
Data
Register
Command
Decode &
Control
Logic
Watchdog
Transition
Detector
VCC
VTRIP
+
-
May 30, 2006
X5001
FN8125.1
DESCRIPTION
This device combines three popular functions, Power-
on Reset, Watchdog Timer, and Supply Voltage
Supervision in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
The watchdog timer provides an independent protec-
tion mechanism for microcontrollers. During a system
failure, the device will respond with a RESET signal
after a selectable time out interval. The user selects the
interval from three preset values. Once selected, the
interval does not change, even after cycling the power.
The user’s system is protected from low voltage condi-
tions by the device’s low VCC detection circuitry. When
VCC falls below the minimum VCC trip point, the system
is reset. RESET is asserted until VCC returns to proper
operating levels and stabilizes. Five industry standard
VTRIP thresholds are available, however, Intersil’s
unique circuits allow the threshold to be reprogrammed
to meet custom requirements or to fine-tune the thresh-
old for applications requiring higher precision.
The device utilizes Intersil’s proprietary Direct Write
cell for the watchdog timer control bits and the VTRIP
storage element, providing a minimum endurance of
100,000 write cycles and a minimum data retention of
100 years.
Watchdog
Timer
Reset &
Watchdog
Timebase
Power-on/
Low Voltage
REset
Generation
RESET
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 page




X5001 pdf
X5001
PRINCIPLES OF OPERATION
Power-on Reset
Application of power to the X5001 activates a power-
on reset circuit. This circuit goes active at 1V and pulls
the RESET/RESET pin active. This signal prevents
the system microprocessor from starting to operate
with insufficient voltage or prior to stabilization of the
oscillator. When VCC exceeds the device VTRIP value
for 200ms (nominal) the circuit releases RESET,
allowing the processor to begin executing code.
Low Voltage Monitoring
During operation, the X5001 monitors the VCC level
and asserts RESET if supply voltage falls below a pre-
set minimum VTRIP. The RESET signal prevents the
microprocessor from operating in a power fail or
brownout condition. The RESET signal remains active
until the voltage drops below 1V. It also remains active
until VCC returns and exceeds VTRIP for 200ms.
Watchdog Timer
The watchdog timer circuit monitors the microprocessor
activity by monitoring the WDI input. The microproces-
sor must toggle the CS/WDI pin periodically to prevent
a RESET signal. The CS/WDI pin must be toggled
from HIGH to LOW prior to the expiration of the watch-
dog time out period. The state of two nonvolatile control
bits in the watchdog register determine the watchdog
timer period.
Vcc Threshold Reset Procedure
The X5001 is shipped with a standard VCC threshold
(VTRIP) voltage. This value will not change over normal
operating and storage conditions. However, in applica-
tions where the standard VTRIP is not exactly right, or if
higher precision is needed in the VTRIP value, the
X5001 threshold may be adjusted. The procedure is
described in the following sections, and requires the
application of a high voltage control signal.
Setting the VTRIP Voltage
This procedure is used to set the VTRIP to a higher
voltage value. For example, if the current VTRIP is 4.4V
and the new VTRIP is 4.6V, this procedure will directly
make the change. If the new setting is to be lower than
the current setting, then it is necessary to reset the trip
point before setting the new value.
To set the new VTRIP voltage, apply the desired VTRIP
threshold voltage to the VCC pin and tie the WPE pin to
the programming voltage VP. Then a VTRIP programming
command sequence is sent to the device over the SPI
interface. This VTRIP programming sequence consists of
pulling CS LOW, then clocking in data 03h, 00h and 01h.
This is followed by bringing CS HIGH then LOW and
clocking in data 02h, 00h, and 01h (in order) and bringing
CS HIGH. This initiates the VTRIP programming
sequence. VP is brought LOW to end the operation.
Resetting the VTRIP Voltage
This procedure is used to set the VTRIP to a “native”
voltage level. For example, if the current VTRIP is 4.4V
and the new VTRIP must be 4.0V, then the VTRIP must
be reset. When VTRIP is reset, the new VTRIP is some-
thing less than 1.7V. This procedure must be used to
set the voltage to a lower value.
To reset the VTRIP voltage, apply greater than 3V to
the VCC pin and tie the WPE pin to the programming
voltage VP. Then a VTRIP command sequence is sent
to the device over the SPI interface. This VTRIP pro-
gramming sequence consists of pulling CS LOW, then
clocking in data 03h, 00h and 01h. This is followed by
bringing CS HIGH then LOW and clocking in data 02h,
00h, and 03h (in order) and bringing CS HIGH. This
initiates the VTRIP programming sequence. VP is
brought LOW to end the operation.
5 FN8125.1
May 30, 2006

5 Page





X5001 arduino
X5001
ABSOLUTE MAXIMUM RATINGS
Temperature under bias ................... -65°C to +135°C
Storage temperature ........................ -65°C to +150°C
Voltage on any pin with
respect to VSS ...................................... -1.0V to +7V
D.C. output current ............................................... 5mA
Lead temperature (soldering, 10s) .................... 300°C
RECOMMENDED OPERATING CONDITIONS
Temperature
Commercial
Min.
0°C
Max.
+70°C
COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only; the functional operation of
the device (at these or any other conditions above
those listed in the operational sections of this
datasheet) is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may affect
device reliability.
Voltage Option
-1.8
-2.7 or -2.7A
-4.5 or -4.5A
Supply Voltage Limits
1.8V to 3.6V
2.7V to 5.5V
4.5V to 5.5V
Note: PT= Package, Temperature
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified)
Symbol
ICC1
ICC2
ISB1
ISB2
ISB3
ILI
ILO
VIL(1)
VIH(1)
VOL1
VOL2
VOL3
VOH1
VOH2
VOH3
VOLRS
Parameter
VCC write current
(Active)
VCC read current
(Active)
VCC standby current
WDT=OFF
VCC standby current
WDT=ON
VCC standby current
WDT=ON
Input leakage current
Output leakage current
Input LOW voltage
Input HIGH voltage
Output LOW voltage
Output LOW voltage
Output LOW voltage
Output HIGH voltage
Output HIGH voltage
Output HIGH voltage
Reset output LOW
voltage
Min.
Limits
Typ
Max.
5
0.4
1
Unit
mA
mA
µA
Test Conditions
SCK = VCC x 0.1/VCC x 0.9 @ 5MHz,
SO = Open
SCK = VCC x 0.1/VCC x 0.9 @ 5MHz,
SO = Open
CS = VCC, VIN = VSS or VCC, VCC = 5.5V
50 µA CS = VCC, VIN = VSS or VCC, VCC = 5.5V
20 µA CS = VCC, VIN = VSS or VCC, VCC = 3.6V
0.1 10
µA VIN = VSS to VCC
0.1 10
µA VOUT = VSS to VCC
-0.5 VCC x 0.3 V
VCC x 0.7
VCC + 0.5 V
0.4 V VCC > 3.3V, IOL = 2.1mA
0.4 V 2V < VCC < 3.3V, IOL = 1mA
0.4 V VCC 2V, IOL = 0.5mA
VCC-0.8
V VCC > 3.3V, IOH = -1.0mA
VCC-0.4
V 2V < VCC 3.3V, IOH = -0.4mA
VCC-0.2
V VCC 2V, IOH = -0.25mA
0.4 V IOL = 1mA
11 FN8125.1
May 30, 2006

11 Page







PáginasTotal 20 Páginas
PDF Descargar[ Datasheet X5001.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
X5001CPU SupervisorXicor
Xicor
X5001CPU SupervisorIntersil Corporation
Intersil Corporation

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar