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PDF EL7585A Data sheet ( Hoja de datos )
| Número de pieza | EL7585A | |
| Descripción | TFT-LCD Power Supply | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
March 9, 2006
EL7585A
FN7523.3
TFT-LCD Power Supply
The EL7585A represents a multiple output regulators for use
in all large panel, TFT-LCD applications. It features a single
boost converter with integrated 3.5A FET, two positive LDOs
for VON and VLOGIC generation, and a single negative LDO
for VOFF generation. The boost converter can be
programmed to operate in either P-mode or PI-mode for
improved load regulation.
The EL7585A also integrates fault protection for all four
channels. Once a fault is detected, the device is latched off
until the input supply or EN is cycled. This device also
features an integrated start-up sequence for VBOOST, VOFF,
then VON or for VOFF, VBOOST, and VON sequencing. The
latter requires a single external transistor. The timing of the
start-up sequence is set using an external capacitor. The
VLOGIC output is constantly enabled, but does shut down
when a fault condition is detected.
The EL7585A is specified for operation over the -40°C to
+85°C temperature range.
Pinout
www.DataSheet4U.com
EL7585A
(20 LD QFN)
TOP VIEW
CDLY 1
DELB 2
LX1 3
LX2 4
DRVP 5
THERMAL
PAD
15 CINT
14 VREF
13 PGND
12 PGND
11 FBN
Features
• 3.5A current limit FET options
• 3V to 5V input
• Up to 20V boost out
• 1% regulation on all outputs
• VOFF-VBOOST-VON or
VBOOST-VOFF-VON sequence control
- VLOGIC is on from start-up for EL7585A
• Programmable sequence delay
• Fully fault protected
• Thermal shutdown
• Internal soft-start
• 20 Ld QFN packages
• Pb-free plus anneal available (RoHS compliant)
Applications
• LCD monitors (15”+)
• LCD-TV (up to 40”+)
• Notebook displays (up to 16”)
• Industrial/medical LCD displays
Ordering Information
PART
PART NUMBER MARKING
TAPE & PKG.
PACKAGE REEL DWG. #
EL7585AILZ
(Note)
7585AIL Z 20 Ld 4x4 QFN - MDP0046
(Pb-free)
EL7585AILZ-T7 7585AIL Z 20 Ld 4x4 QFN 7” MDP0046
(Note)
(Pb-free)
EL7585AILZ-T13 7585AIL Z 20 Ld 4x4 QFN 13” MDP0046
(Note)
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
EL7585A
Typical Performance Curves
100
90 VO=9V
80
70 VO=12V
60 VO=15V
50
40
30
20
10
0
0 0.1 0.2 0.3 0.4 0.5 0.6
IOUT (A)
FIGURE 1. VBOOST EFFICIENCY AT VIN=3V (PI MODE)
100
90
VO=9V
80 VO=12V
70 VO=15V
60
50
40
30
20
10
0
0 0.5 1 1.5
IOUT (A)
FIGURE 2. VBOOST EFFICIENCY AT VIN=5V (PI MODE)
100
90 VO=9V
80
70
60
VO=15V
VO=12V
50
40
30
20
10
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
IOUT (A)
FIGURE 3. VBOOST EFFICIENCY AT VIN=3V (P MODE)
100
90
VO=9V
80
70
VO=15V
VO=12V
60
50
40
30
20
10
0
0 0.5 1 1.5
IOUT (A)
FIGURE 4. VBOOST EFFICIENCY AT VIN=5V (P MODE)
0
-0.1
-0.2 VO=9V
-0.3 VO=15V
-0.4
-0.5
0
VO=12V
0.1 0.2 0.3 0.4 0.5 0.6
IOUT (A)
FIGURE 5. VBOOST LOAD REGULATION AT VIN=3V (PI MODE)
0
-0.1
VO=9V
-0.2
-0.3
-0.4 VO=12V
-0.5 VO=15V
-0.6
0 0.2 0.4 0.6 0.8 1 1.2 1.4
IOUT (A)
FIGURE 6. VBOOST LOAD REGULATION AT VIN=5V (PI MODE)
5 FN7523.3
March 9, 2006
5 Page 
EL7585A
Operation of the DELB Output Function
An open drain DELB output is provided to allow the boost
output voltage, developed at C2 (see application diagram),
to be delayed via an external switch (Q4) to a time after the
VBOOST supply and negative VOFF charge pump supply
have achieved regulation during the start-up sequence
shown in Figure 28. This then allows the AVDD and VON
supplies to start-up from 0V instead of the normal offset
voltage of VIN-VDIODE (D1) if Q4 were not present.
When DELB is activated by the start-up sequencer, it sinks
50µA allowing a controlled turn-on of Q4 and charge-up of
C9. C16 can be used to control the turn-on time of Q4 to
reduce inrush current into C9. The potential divider formed
by R9 and R8 can be used to limit the VGS voltage of Q4 if
required by the voltage rating of this device. When the
voltage at DELB falls to less than 0.6V, the sink current is
increased to ~1.2mA to firmly pull DELB to 0V.
The voltage at DELB is monitored by the fault protection
circuit so that if the initial 50µA sink current fails to pull DELB
below ~0.6V after the start-up sequencing has completed,
then a fault condition will be detected and a fault time-out
ramp will be initiated on the CDEL capacitor (C7).
Operation of the PG Output Function
The PG output consists of an internal pull-up PMOS device
to VIN, to turn-off the external Q1 protection switch and a
current limited pull-down NMOS device which sinks ~15µA
allowing a controlled turn-on of Q1 gate capacitance. CO is
used to control how fast Q1 turns-on - limiting inrush current
into C1. When the voltage at the PG pin falls to less than
0.6V, the PG sink current is increased to ~1.2mA to firmly
pull the pin to 0V.
The voltage at PG is monitored by the fault protection circuit
so that if the initial 15µA sink current fails to pull PG below
~0.6V after the start-up sequencing has completed, then a
fault condition will be detected and a fault time-out ramp will
be initiated on the CDEL capacitor (C7).
Cascaded MOSFET Application
A 20V N-channel MOSFET is integrated in the boost
regulator. For the applications where the output voltage is
greater than 20V, an external cascaded MOSFET is needed
as shown in Figure 20. The voltage rating of the external
MOSFET should be greater than VBOOST.
VIN
LX
EL7585A
FB
VBOOST
FIGURE 20. CASCADED MOSFET TOPOLOGY FOR HIGH
OUTPUT VOLTAGE APPLICATIONS
Linear-Regulator Controllers (VON, VLOGIC, and
VOFF)
The EL7585A includes three independent linear-regulator
controllers, in which two are positive output voltage (VON
and VLOGIC), and one is negative. The VON, VOFF, and
VLOGIC linear-regulator controller functional diagrams,
applications circuits are shown in Figures 21, 22, and 23
respectively.
Calculation of the Linear Regulator Base-Emitter
Resistors (RBL, RBP and RBN)
For the pass transistor of the linear regulator, low frequency
gain (Hfe) and unity gain freq. (fT) are usually specified in the
datasheet. The pass transistor adds a pole to the loop
transfer function at fp=fT/Hfe. Therefore, in order to maintain
phase margin at low frequency, the best choice for a pass
device is often a high frequency low gain switching
transistor. Further improvement can be obtained by adding a
base-emitter resistor RBE (RBP, RBL, RBN in the Functional
Block Diagram), which increase the pole frequency to:
fp=fT*(1+ Hfe *re/RBE)/Hfe, where re=KT/qIc. So choose the
lowest value RBE in the design as long as there is still
enough base current (IB) to support the maximum output
current (IC).
We will take as an example the VLOGIC linear regulator. If a
Fairchild FMMT549 PNP transistor is used as the external
pass transistor, Q5 in the application diagram, then for a
maximum VLOGIC operating requirement of 500mA the data
sheet indicates Hfe_min = 100.
The base-emitter saturation voltage is: Vbe_max = 1.25V
(note this is normally a Vbe ~ 0.7V, however, for the Q5
transistor an internal Darlington arrangement is used to
increase it's current gain, giving a 'base-emitter' voltage of
2 x VBE).
(Note that using a high current Darlington PNP transistor for
Q5 requires that VIN > VLOGIC + 2V. Should a lower input
voltage be required, then an ordinary high gain PNP
transistor should be selected for Q5 so as to allow a lower
collector-emitter saturation voltage).
11 FN7523.3
March 9, 2006
11 Page | ||
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| PDF Descargar | [ Datasheet EL7585A.PDF ] | |
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