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PDF EL5132 Data sheet ( Hoja de datos )

Número de pieza EL5132
Descripción (EL5132 / EL5133) 670MHz Low Noise Amplifiers
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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®
Data Sheet
EL5132, EL5133
March 8, 2007
FN7382.7
670MHz Low Noise Amplifiers
The EL5132 and EL5133 are ultra-low voltage noise, high
speed voltage feedback amplifiers that are ideal for
applications requiring low voltage noise, including
communications and imaging. These devices offer extremely
low power consumption for exceptional noise performance.
Stable at gains as low as 10, these devices offer 120mA of
drive performance. Not only do these devices find perfect
application in high gain applications, they maintain their
performance down to lower gain settings.
These amplifiers are available in small package options
(SOT-23) as well as the industry-standard SO packages. All
parts are specified for operation over the -40°C to +85°C
temperature range.
Pinouts
EL5132
(8 LD SO)
TOP VIEW
NC 1
IN- 2
IN+ 3
VS- 4
-
+
8 CE
7 VS+
6 OUT
5 NC
EL5133
(5 LD SOT-23)
TOP VIEW
OUT 1
5 VS+
VS- 2
+-
IN+ 3
4 IN-
Features
• 670MHz -3dB bandwidth
• Ultra low noise 0.9nV/Hz
• 1000V/µs slew rate
• Low supply current = 12mA
• Single supplies from 5V to 12V
• Dual supplies from ±2.5V to ±6V
• Fast disable on the EL5132
• Pb-free plus anneal available (RoHS compliant)
Applications
• Pre-amplifier
• Receiver
• Filter
• IF and baseband amplifier
• ADC drivers
• DAC buffers
• Instrumentation
• Communications devices
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003-2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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EL5132 pdf
EL5132, EL5133
Typical Performance Curves (Continued)
5
4
AV = +10
RG = 25Ω
3 RL = 500Ω
2 CL = +1pF
VS=±4
1
0
-1
-2
-3
-4
-5
100k
VS = ±6
VS = ±5V
VS = ±3V
VS = ±2.5V
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS ±VS
5
VS = ±5V
4 AV = +10
3 RG = 25Ω
2 CL = +1pF
1
0
-1
-2
-3
-4
-5
100k
1M
RL = 1kΩ
RL=100Ω
RL=150Ω
RL=500Ω
10M
100M
FREQUENCY (Hz)
1G
FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS RLOAD
(AV = +10)
5
4
VS = ±5V
AV = +20
3 RG = 25Ω
2 CL = +1pF
1
RL=1kΩ
0
-1
-2 RL=500Ω
-3 RL=150Ω
-4 RL=100Ω
-5
100k
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS RLOAD
(AV = +20)
5
4
VS = ±5V
AV = +10
3 RG = 25Ω
2
RF = 225Ω
RL = 500Ω
1
CL=3.3pF CL= 12pF
CL=6.8pF
0
-1
-2 CL= 1pF
-3
-4
-5
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS CLOAD
(AV = +10)
5
4
VS = ±5V
AV = +20
3 RG = 25Ω
2
RF = 475
RL = 500Ω
1
CL= 23pF
CL= 12pF
CL=39pF
0
-1
-2
-3 CL=1pF
-4
-5
100k
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS CLOAD
(AV = +20)
5
4
VS = ±5V
AV = +10
3 RL = 500Ω
2 CL = +1pF
RF = 900Ω
RF = 450Ω
1
0
-1
-2
RF = 90Ω
-3
-4 RF = 225Ω
-5
100k
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS RF (AV = +10)
5

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EL5132 arduino
EL5132, EL5133
less, and disabled when CE is above 4V. Although the logic
levels are not standard TTL, this choice of logic voltages
allows the EL5132 to be enabled by typing CE to ground,
even in 5V single supply applications. The CE pin can be
driving from CMOS outputs.
Supply Voltage Range and Single-Supply
Operation
The EL5132 and EL5133 have been designed to operate
with supply voltages having a span of greater than 5V and
less than 12V. In practical terms, this means that they will
operate on dual supplies ranging from ±2.5V to ±6V. With
single-supply, the EL5132 and EL5133 will operate from 5V
to 12V. To prevent internal circuit latch-up, the slew rate
between the negative and positve supplies must be less
than 1V/µs.
As supply voltages continue to decrease, it becomes
necessary to provide input and output voltage ranges that
can get as close as possible to the supply voltages. The
EL5132 and EL5133 have an input range which extends to
within 2V of either supply. So, for example, on ±5V supplies,
the EL5132 and EL5133 have an input range which spans
±3V. The output range of the EL5132 and EL5133 are also
quite large, extending to within 2V of the supply rail. On a
±5V supply, the output is therefore capable of swinging from
-3.1V to +3.1V. Single-supply output range is larger because
of the increased negative swing due to the external pull-
down resistor to ground.
Power Dissipation
With the wide power supply range and large output drive
capability of the EL5132 and EL5133, it is possible to exceed
the 150°C maximum junction temperatures under certain
load and power-supply conditions. It is therefore important to
calculate the maximum junction temperature (TJMAX) for all
applications to determine if power supply voltages, load
conditions, or package type need to be modified for the
EL5132 and EL5133 to remain in the safe operating area.
These parameters are related as follows:
TJMAX = TMAX + JAxPDMAXTOTAL)
(EQ. 1)
where:
• PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
PDMAX for each amplifier can be calculated as follows:
PDMAX = 2*VS × ISMAX + (VS - VOUTMAX ) × V-----O----U--R--T---L-M-----A----X--(EQ. 2)
where:
• TMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
• VS = Supply voltage
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the
application
• RL = Load resistance
Power Supply Bypassing And Printed Circuit
Board Layout
As with any high frequency devices, good printed circuit
board layout is essential for optimum performance. Ground
plane construction is highly recommended. Pin lengths
should be kept as short as possible. The power supply pins
must be closely bypassed to reduce the risk of oscillation.
The combination of a 4.7µF tantalum capacitor in parallel
with 0.1µF ceramic capacitor has been proven to work well
when placed at each supply pin. For single supply operation,
where pin 4 (VS-) is connected to the ground plane, a single
4.7µF tantalum capacitor in parallel with a 0.1µF ceramic
capacitor across pin 8 (VS+).
For good AC performance, parasitic capacitance should be
kept to a minimum. Ground plane construction again should
be used. Small chip resistors are recommended to minimize
series inductance. Use of sockets should be avoided since
they add parasitic inductance and capacitance which will
result in additional peaking and overshoot.
11

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