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PDF FCAS50SN60 Data sheet ( Hoja de datos )

Número de pieza FCAS50SN60
Descripción Smart Power Module
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FCAS50SN60 Hoja de datos, Descripción, Manual

September 2006
FCAS50SN60
Smart Power Module for SRM
Features
• Very low thermal resistance due to using DBC
• 600V-50A single-phase asymmetric bridge IGBT converter
for SRM drive including control ICs for gate driving and pro-
tection
• Divided negative dc-link terminals for inverter current sensing
applications
• Single-grounded power supply due to built-in HVIC
• Switching frequency of 2.2~8kHz
• Isolation rating of 2500Vrms/min.
Applications
• AC 200V ~ 242V single-phase SRM drives for home
application vacuum cleaner.
General Description
FCAS50SN60 is an advanced smart power module for SRM
drive that Fairchild has newly developed and designed to pro-
vide very compact and high performance SRM motor drives
mainly targeting low-power inverter-driven SRM application
especially for a vacuum air cleaner. It combines optimized cir-
cuit protection and drive matched to low-loss IGBTs. System
reliability is further enhanced by the integrated under-voltage
lock-out and short-circuit protection. The high speed built-in
HVIC provides opto-coupler-less IGBT gate driving capability
that further reduce the overall size of the inverter system
design. In addition the incorporated HVIC facilitates the use of
single-supply drive topology enabling the FCAS50SN60 to be
driven by only one drive supply voltage without negative bias.
Each phase current of inverter can be monitored separately due
to the divided negative dc terminals.
www.DataSheet4U.com
Top View
44 mm
Bottom View
26.8 mm
Figure 1.
©2006 Fairchild Semiconductor Corporation
FCAS50SN60 Rev. A
1
www.fairchildsemi.com

1 page




FCAS50SN60 pdf
Absolute Maximum Ratings (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Symbol
Parameter
Conditions
Rating Units
VPN(Surge)
VCES
± IC
± ICP
PC
TJ
Supply Voltage (Surge)
Collector-emitter Voltage
Each IGBT Collector Current
Each IGBT Collector Current (Peak)
Collector Dissipation
Operating Junction Temperature
Applied between P- NA, NB1, NB2
TC = 25°C
TC = 25°C, Under 1ms Pulse Width
TC = 25°C per One IGBT
(Note 1)
550
600
50
100
110
-20 ~ 125
V
V
A
A
W
°C
Note:
1. The maximum junction temperature rating of the power chips integrated within the module is 150 °C(@TC 100°C). However, to insure safe operation, the average junction
temperature should be limited to TJ(ave) 125°C (@TC 100°C)
Control Part
Symbol
Parameter
Conditions
Rating Units
VCC Control Supply Voltage
Applied between VCC(H), VCC(L) - COM
VBS High-side Control Bias Voltage Applied between VB - VS
VIN Input Signal Voltage
Applied between IN(H), IN(L) - COM
20
20
-0.3~5.5
V
V
V
VFO Fault Output Supply Voltage
Applied between VFO - COM
IFO Fault Output Current
Sink Current at VFO Pin
VSC Current Sensing Input Voltage Applied between CSC - COM
-0.3~VCC+0.3
5
-0.3~VCC+0.3
V
mA
V
Total System
Symbol
Parameter
VPN(PROT) Self Protection Supply Voltage Limit
(Short Circuit Protection Capability)
TC
TSTG
VISO
Module Case Operation Temperature
Storage Temperature
Isolation Voltage
Conditions
VCC = VBS = 13.5 ~ 16.5V
TJ = 125°C, Non-repetitive, less than 6µs
60Hz, Sinusoidal, AC 1 minute, Connection
Pins to DBC
Rating
400
-20 ~ 95
-40 ~ 125
2500
Units
V
°C
°C
Vrms
Thermal Resistance
Symbol
Parameter
Conditions
Rth(j-c)Q
Rth(j-c)F
Junction to Case Thermal
Resistance
Each IGBT under Operating Condition
Each FWDi under Operating Condition
Note:
2. For the measurement point of case temperature (TC), please refer to Figure 2.
Min.
-
-
Typ.
-
-
Max.
0.90
2.2
Units
°C/W
°C/W
FCAS50SN60 Rev. A
5
www.fairchildsemi.com

5 Page





FCAS50SN60 arduino
CPU
5V-Line
RPF=
4.7k
100
1nF
CPF=
1nF
SRM Module
VFO
COM
Note:
1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s
printed circuit board. The input signal section integrates 3.3k(typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal
voltage drop at input terminal.
2. The logic input is compatible with standard CMOS or LSTTL outputs.
Figure 10. Recommended CPU I/O Interface Circuit
This Value depends on PWM Control Algorithm
15V-Line
RBS
DBS
SRM module
18uF
0.1uF
P
1000uF
1uF
Outputs
NA
NB
Note:
It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics. RBS should be 2.5 times greater than RE(H)
Figure 11. Recommended Bootstrap Operation Circuit and Parameters
FCAS50SN60 Rev. A
11
www.fairchildsemi.com

11 Page







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