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PDF XP1022-QF Data sheet ( Hoja de datos )
| Número de pieza | XP1022-QF | |
| Descripción | GaAs MMIC Power Amplifier | |
| Fabricantes | Mimix Broadband | |
| Logotipo |  |
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17.0-25.0 GHz GaAs MMIC
Power Amplifier, QFN
November 2006 - Rev 15-Nov-06
Features
Excellent Transmit Output Stage
Temperature Compensated Output Detector
On-Chip ESD Protection
20.0 dB Small Signal Gain
+28.0 dBm P1dB Compression Point
RoHS Compliant SMD, 4x4 mm QFN Package
100% RF, DC and Output Power Testing
General Description
Mimix Broadband’s three stage 17.0-25.0 GHz GaAs
MMIC buffer amplifier has a small signal gain of 20.0
dB with a +28.0 dBm P1dB output compression point
across much of the band.The device also includes a
temperature compensated output power detector.
This MMIC uses Mimix Broadband’s 0.15 µm GaAs
PHEMT device model technology, and is based upon
electron beam lithography to ensure high
repeatability and uniformity.The device comes in a
RoHS compliant 4x4mm QFN Surface Mount Package
offering excellent RF and thermal properties.This
www.DataSheet4U.com
device is well suited for Millimeter-wave
Point-to-Point Radio, LMDS, SATCOM and VSAT
applications.
P1022-QF
Absolute Maximum Ratings
Supply Voltage (Vd)
Supply Current (Id1,2,3)
Gate Bias Voltage (Vg)
Input Power (Pin)
Storage Temperature (Tstg)
Operating Temperature (Ta)
Channel Temperature (Tch)
+6.0 VDC
145, 290, 580 mA
+0.3 VDC
+19.0 dBm
-65 to +165 OC
-55 to MTTF Graph1
MTTF Graph1
(1) Channel temperature affects a device's MTTF. It is
recommended to keep channel temperature as low as
possible for maximum life.
Electrical Characteristics (Ambient Temperature T = 25 oC)
Parameter
Frequency Range (f )
Input Return Loss (S11)
Output Return Loss (S22)
Small Signal Gain (S21)
Gain Flatness ( S21)
Reverse Isolation (S12)
Output Power for 1dB Compression (P1dB) 2
Drain Bias Voltage (Vd1,2,3) (Vdet)
Gate Bias Voltage (Vg1,2,3)
Supply Current (Id1) (Vd=5.0V, Vg=-0.7V Typical)
Supply Current (Id2) (Vd=5.0V, Vg=-0.7V Typical)
Supply Current (Id3) (Vd=5.0V, Vg=-0.7V Typical)
Detector (diff ) Output at 20 dBm3
(2) Measured using constant current.
(3) Measured with Vdet=5.0V
Units Min. Typ. Max.
GHz 17.0 - 25.0
dB - 9.0 -
dB - 10.0 -
dB - 20.0 -
dB - +/-2.0 -
dB - 50.0 -
dBm - +28.0 -
VDC - +5.0 +5.5
VDC -1.0 -0.7 0.0
mA - 100 120
mA - 200 240
mA - 400 480
VDC - 0.38 -
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 1 of 8
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.
1 page  
17.0-25.0 GHz GaAs MMIC
Power Amplifier, QFN
November 2006 - Rev 15-Nov-06
P1022-QF
App Note [1] Biasing - It is recommended to separately bias each amplifier stage Vd1 through Vd3 at Vd(1,2,3)=5.0V with Id1=100mA, Id2=200mA
and Id3=400mA. Separate biasing is recommended if the amplifier is to be used at high levels of saturation, where gate rectification will alter the
effective gate control voltage. For non-critical applications it is possible to parallel all stages and adjust the common gate voltage for a total drain
current Id(total)=700 mA. It is also recommended to use active biasing to keep the currents constant as the RF power and temperature vary; this
gives the most reproducible results. Depending on the supply voltage available and the power dissipation constraints, the bias circuit may be a
single transistor or a low power operational amplifier, with a low value resistor in series with the drain supply used to sense the current.The gate of
the pHEMT is controlled to maintain correct drain current and thus drain voltage.The typical gate voltage needed to do this is -0.7V.Typically the
gate is protected with Silicon diodes to limit the applied voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is
available before applying the positive drain supply.
App Note [2] Bias Arrangement -
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the drain or gate pad DC bypass
capacitors (~100-200 pF) can be combined. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or combination (if gate or
drains are tied together) of DC bias pads.
For Individual Stage Bias (Recommended for saturated applications) - Each DC pad (Vd1,2,3 and Vg1,2,3) needs to have DC bypass capacitance
(~100-200 pF) as close to the device as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.
VD1
VD2
10 nF
10 nF
10 nF
VD3
RF IN
50 Ohm Line
XP1022-QF
RF OUT
50 Ohm Line
VG1
10 nF
VG2
100 PF
10 nF
1 M ohm
1 M Ohm
100 PF
VG3
100 PF
10 nF
V_REF
+5 V
V_DET
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 5 of 8
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet XP1022-QF.PDF ] | |
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