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PDF XP1011 Data sheet ( Hoja de datos )

Número de pieza XP1011
Descripción GaAs MMIC Power Amplifier
Fabricantes Mimix Broadband 
Logotipo Mimix Broadband Logotipo



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No Preview Available ! XP1011 Hoja de datos, Descripción, Manual

36.0-40.0 GHz GaAs MMIC
Power Amplifier
May 2006 - Rev 10-May-06
Features
Excellent Linear Output Amplifier Stage
21.0 dB Small Signal Gain
+36.0 dBm Third Order Intercept (OIP3)
+27.0 dBm Output P1dB Compression Point
100% On-Wafer RF, DC and Output Power Testing
100% Visual Inspection to MIL-STD-883
Method 2010
General Description
Mimix Broadband’s three stage 36.0-40.0 GHz GaAs
MMIC power amplifier is optimized for linear operation
with a third order intercept point of +36.0 dBm.This
MMIC uses Mimix Broadband’s 0.15 µm GaAs PHEMT
device model technology, and is based upon electron
beam lithography to ensure high repeatability and
uniformity.The chip has surface passivation to protect
and provide a rugged part with backside via holes and
gold metallization to allow either a conductive epoxy
orwww.DataSheet4U.com eutectic solder die attach process. This device is well
suited for Millimeter-wave Point-to-Point Radio, LMDS,
SATCOM and VSAT applications.
Velocium Products
18 - 20 GHz HPA
- APH478
P1011
Chip Device Layout
Absolute Maximum Ratings
Supply Voltage (Vd)
Supply Current (Id1,2,3)
Gate Bias Voltage
Input Power (Pin)
Storage Temperature (Tstg)
Operating Temperature (Ta)
Channel Temperature (Tch)
+5.5 VDC
155,415,715 mA
+0.3 VDC
+8 dBm
-65 to +165 OC
-55 to MTTF TAble3
MTTF Table 3
(3) Channel temperature affects a device's MTTF. It is
recommended to keep channel temperature as low as
possible for maximum life.
Electrical Characteristics (Ambient Temperature T = 25 oC)
Parameter
Frequency Range (f )
Input Return Loss (S11)
Output Return Loss (S22)
Small Signal Gain (S21)
Gain Flatness ( S21)
Reverse Isolation (S12)
Output Power for 1 dB Compression (P1dB) 2
Output Third Order Intercept Point (OIP3)1,2
Drain Bias Voltage (Vd1,2,3)
Gate Bias Voltage (Vg1,2,3)
Supply Current (Id) (Vd=5.0V, Vg=-0.5V Typical)
Units Min. Typ. Max.
GHz 36.0 - 40.0
dB - 10.0 -
dB - 9.0 -
dB - 21.0 -
dB - +/-0.5 -
dB - - -
dBm - +27.0 -
dBm - +36.0 -
VDC - +5.0 -
VDC -1.0 -0.5 0.0
mA - 640 -
(1) Measured at +18 dBm per tone output carrier level across the full frequency band.
(2) Measured using constant current.
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 1 of 6
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.

1 page




XP1011 pdf
36.0-40.0 GHz GaAs MMIC
Power Amplifier
May 2006 - Rev 10-May-06
P1011
App Note [1] Biasing - It is recommended to separately bias each stage at Vd(1,2,3)=5.0V, Id1=100mA, Id2=270mA, and Id3=270mA. It
is also recommended to use active biasing to keep the currents constant as the RF power and temperature vary; this gives the most
reproducible results. Depending on the supply voltage available and the power dissipation constraints, the bias circuit may be a
single transistor or a low power operational amplifier, with a low value resistor in series with the drain supply used to sense the
current.The gate of the pHEMT is controlled to maintain correct drain current and thus drain voltage.The typical gate voltage needed
to do this is -0.5V.Typically the gate is protected with Silicon diodes to limit the applied voltage. Also, make sure to sequence the
applied voltage to ensure negative gate bias is available before applying the positive drain supply.
App Note [2] Bias Arrangement -
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the drain or gate pad DC
bypass capacitors (~100-200 pF) can be combined. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or
combination (if gate or drains are tied together) of DC bias pads.
For Individual Stage Bias (Recommended for Saturated Applications) -- Each DC pad (Vd1,2,3 and Vg1,2,3) needs to have DC bypass
capacitance (~100-200 pF) as close to the device as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.
MTTF Table (TBD)
These numbers were calculated based on accelerated life test information and thermal model analysis received from the fabricating foundry.
Backplate
Temperature
55 deg Celsius
75 deg Celsius
95 deg Celsius
Channel
Temperature
deg Celsius
deg Celsius
deg Celsius
Rth
MTTF Hours
FITs
C/W E+ E+
C/W E+ E+
C/W E+ E+
Bias Conditions: Vd1=Vd2=Vd3=5.0V, Id1=100 mA, Id2=270 mA, Id3=270 mA
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 5 of 6
Characteristic Data and Specifications are subject to change without notice. ©2006 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.

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