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PDF USB2227 Data sheet ( Hoja de datos )

Número de pieza USB2227
Descripción (USB2227 / USB2228) 4th Generation USB2.0 Flash Media Controller
Fabricantes SMSC Corporation 
Logotipo SMSC Corporation Logotipo



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No Preview Available ! USB2227 Hoja de datos, Descripción, Manual

USB2227/USB2228
4th Generation USB2.0
Flash Media Controller
with Integrated Card
Power FETs
PRODUCT FEATURES
„ Complete System Solution for interfacing SmartMediaTM
(SM) or xD Picture CardTM (xD)1, Memory StickTM (MS),
High Speed Memory Stick (HSMS), Memory Stick PRO
(MSPRO), MS DuoTM, Secure Digital (SD), Mini-Secure
Digital (Mini-SD), TransFlash (SD), MultiMediaCardTM
(MMC), Reduced Size MultiMediaCard (RS-MMC), NAND
Flash, Compact FlashTM (CF) and CF UltraTM I & II, and CF
form-factor ATA hard drives to USB2.0 bus
— Supports USB Bulk Only Mass Storage Compliant
Bootable BIOS
„ Support for simultaneous operation of all above devices.
(only one at a time of each of the following groups
supported: CF or ATA drive, SM or XD or NAND, SD or
MMC)
„ On-Chip 4-Bit High Speed Memory Stick and MS PRO
Hardware Circuitry
„ On-Chip firmware reads and writes High Speed Memory
Stick and MS PRO
„ 1-bit ECC correction performed in hardware for maximum
efficiency
„ Hardware support for SD Security Command Extensions
„ On-chip power FETs for supplying flash media card power
with minimum board components
„ USB Bus Power Certified
„ 3.3 Volt I/O with 5V input tolerance on VBUS/GPIO3
„ Complete USB Specification 2.0 Compatibility for Bus
Powered Operation
— Includes USB2.0 Transceiver
— A Bi-directional Control and a Bi-directional Bulk
Endpoint are provided.
„ 8051 8 bit microprocessor
— Provides low speed control functions
— 30 Mhz execution speed at 4 cycles per instruction
average
— 12K Bytes of internal SRAM for general purpose
scratchpad
— 768 Bytes of internal SRAM for general purpose
scratchpad or program execution while re-flashing
external ROM
„ Double Buffered Bulk Endpoint
— Bi-directional 512 Byte Buffer for Bulk Endpoint
— 64 Byte RX Control Endpoint Buffer
— 64 Byte TX Control Endpoint Buffer
Datasheet
„ Internal or External Program Memory Interface
— 64K Byte Internal Code Space or Optional 64K Byte
External Code Space using Flash, SRAM or EPROM
memory.
„ On Board 24Mhz Crystal Driver Circuit
„ Can be clocked by 48MHz external source
„ On-Chip 1.8V Regulator for Low Power Core Operation
„ Internal PLL for 480Mhz USB2.0 Sampling, Configurable
MCU clock
„ Supports firmware upgrade via USB bus if “boot block”
Flash program memory is used
„ 15 GPIOs for special function use: LED indicators, button
inputs, power control to memory devices, etc.
— Inputs capable of generating interrupts with either edge
sensitivity
— Attribute bit controlled features:
— Activity LED polarity/operation/blink rate
— Full or Partial Card compliance checking
— Bus or Self Powered
— LUN configuration and assignment
— Write Protect Polarity
— SmartDetach™ Detach from USB when no Card
Inserted for Notebook apps
— Cover Switch operation for xD compliance
— Inquiry Command operation
— SD Write Protect operation
— Older CF card support
— Force USB 1.1 reporting
— Internal or External Power FET operation
„ Compatible with Microsoft WinXP, WinME, Win2K SP3,
Apple OS10, Softconnex, and Linux Multi-LUN Mass
Storage Class Drivers
„ Win2K, Win98/98SE and Apple OS8.6 and OS9 Multi-LUN
Mass Storage Class Drivers available from SMSC
„ 128 Pin VTQFP Lead-free RoHS Compliant Package
(1.0mm height, 14mm x14mm footprint)
„ 124 Pin DQFN Lead-free RoHS Compliant Package (0.8mm
height, 10mm x10mm footprint)
1.xD Picture Card not applicable to USB2227
SMSC USB2227/USB2228
DATASHEET
Revision 1.91 (10-13-06)

1 page




USB2227 pdf
4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs
Datasheet
List of Figures
Figure 3.1
Figure 3.2
Figure 4.1
Figure 7.1
Figure 7.2
USB2227/USB2228 128-Pin VTQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
USB2227/USB2228 124-Pin DQFN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
USB2227/USB2228 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
USB2227/USB2228 128-Pin VTQFP Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
USB2227/USB2228 124-Pin DQFN Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SMSC USB2227/USB2228
5
DATASHEET
Revision 1.91 (10-13-06)

5 Page





USB2227 arduino
4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs
Datasheet
Chapter 5 Pin Descriptions
5.1
This section provides a detailed description of each signal. The signals are arranged in functional
groups according to their associated interface.
The “n” symbol in the signal name indicates that the active, or asserted state occurs when the signal
is at a low voltage level. When “n” is not present before the signal name, the signal is asserted when
at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working
with a mixture of “active low” and “active high” signal. The term assert, or assertion indicates that a
signal is active, independent of whether that level is represented by a high or low voltage. The term
negate, or negation indicates that a signal is inactive.
PIN Descriptions
SYMBOL
CF_nCS1
CF_nCS0
CF_SA2
CF_SA1
CF_SA0
CF_IRQ
CF_D[15:8]
128-PIN
VTQFP
61
60
64
63
62
55
52
51
50
48
46
45
41
40
124-PIN
DQFN
BUFFER
TYPE
DESCRIPTION
CompactFlash (In True IDE mode) INTERFACE
A31 O8PU CF Chip Select 1:
This pin is the active low chip select 1 signal for the CF
ATA device.
B28 O8PU CF Chip Select 0:
This pin is the active low chip select 0 signal for the task
file registers of CF ATA device in the True IDE mode.
B30 O8 CF Register Address 2:
This pin is the register select address bit 2 for the CF
ATA device.
A32 O8 CF Register Address 1:
This pin is the register select address bit 1 for the CF
ATA device.
B29 O8 CF Register Address 0:
This pin is the register select address bit 0 for the CF
ATA device.
B26 IPD CF Interrupt:
This is the active high interrupt request signal from the
CF device.
A26 I/O8PD CF Data 15-8:
B24
A25
A24
The bi-directional data signals CF_D15-CF_D8 in True
IDE mode data transfer.
B22
A23
A21
A20
In the True IDE Mode, all of task file register operation
occur on the CF_D[7:0], while the data transfer is on
CF_D[15:0].
The bi-directional data signal has an internal weak pull-
down resistor.
SMSC USB2227/USB2228
11
DATASHEET
Revision 1.91 (10-13-06)

11 Page







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